aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/omap3xxx-clocks.dtsi
diff options
context:
space:
mode:
authorTony Lindgren <tony@atomide.com>2022-04-29 09:57:36 +0300
committerTony Lindgren <tony@atomide.com>2022-05-03 09:15:41 +0300
commit24a3db53ec9cac80b71e14b3c489b98e7537cdae (patch)
tree0262fa25a2bff4a216637d33f42fb6532116107b /arch/arm/boot/dts/omap3xxx-clocks.dtsi
parent392ab2e2af060962ee1e37a5e2aa358f878a8f77 (diff)
downloadlinux-24a3db53ec9cac80b71e14b3c489b98e7537cdae.tar.gz
ARM: dts: Group omap3 CONTROL_DEVCONF0 clocks
The clksel related registers on omap3 cause unique_unit_address and node_name_chars_strict warnings with the W=1 or W=2 make flags enabled. With the clock drivers updated, we can now avoid most of these warnings by grouping the TI component clocks using the TI clksel binding, and with the use of clock-output-names property to avoid non-standard node names for the clocks. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3xxx-clocks.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3xxx-clocks.dtsi36
1 files changed, 22 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index 0656c32439d2..b40832103dd6 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -92,12 +92,28 @@
clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>;
};
- mcbsp1_mux_fck: mcbsp1_mux_fck@4 {
- #clock-cells = <0>;
- compatible = "ti,composite-mux-clock";
- clocks = <&core_96m_fck>, <&mcbsp_clks>;
- ti,bit-shift = <2>;
- reg = <0x04>;
+ /* CONTROL_DEVCONF0 */
+ clock@4 {
+ compatible = "ti,clksel";
+ reg = <0x4>;
+ #clock-cells = <2>;
+ #address-cells = <0>;
+
+ mcbsp1_mux_fck: clock-mcbsp1-mux-fck {
+ #clock-cells = <0>;
+ compatible = "ti,composite-mux-clock";
+ clock-output-names = "mcbsp1_mux_fck";
+ clocks = <&core_96m_fck>, <&mcbsp_clks>;
+ ti,bit-shift = <2>;
+ };
+
+ mcbsp2_mux_fck: clock-mcbsp2-mux-fck {
+ #clock-cells = <0>;
+ compatible = "ti,composite-mux-clock";
+ clock-output-names = "mcbsp2_mux_fck";
+ clocks = <&per_96m_fck>, <&mcbsp_clks>;
+ ti,bit-shift = <6>;
+ };
};
mcbsp1_fck: mcbsp1_fck {
@@ -106,14 +122,6 @@
clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>;
};
- mcbsp2_mux_fck: mcbsp2_mux_fck@4 {
- #clock-cells = <0>;
- compatible = "ti,composite-mux-clock";
- clocks = <&per_96m_fck>, <&mcbsp_clks>;
- ti,bit-shift = <6>;
- reg = <0x04>;
- };
-
mcbsp2_fck: mcbsp2_fck {
#clock-cells = <0>;
compatible = "ti,composite-clock";