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author | Arnd Bergmann <arnd@arndb.de> | 2015-12-12 00:26:26 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2015-12-12 00:26:26 +0100 |
commit | e9093d045ae05629a3d70070322a9f96a764e942 (patch) | |
tree | 1cc8efb6702e5e7673d85afe921e04c6bd5a0c65 /arch/arm/boot/dts/rk3288.dtsi | |
parent | 629b557ab4cd339bce759a1d87a56842df43b4a7 (diff) | |
parent | 066111411101f6b020af1a7c752859a12476ba21 (diff) | |
download | linux-e9093d045ae05629a3d70070322a9f96a764e942.tar.gz |
Merge tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "rockchip dts32 changes for 4.5" from Heiko Stuebner:
First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.
* tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add gpio-ir-receiver to the R89 board
ARM: dts: rockchip: add touchscreen node to veyron minnie
ARM: dts: rockchip: add veyron-mickey board
ARM: dts: rockchip: add veyron-brain board
ARM: dts: rockchip: make sure edp_24m is associated to xin24m on veyron
ARM: dts: rockchip: override thermal settings on veyron-speedy
ARM: dts: rockchip: update the thermal management on rk3288
ARM: dts: rockchip: Add Crypto node for rk3288
ARM: dts: rockchip: add rk3036-evb board
ARM: dts: rockchip: add core rk3036 dtsi
clk: rockchip: add dt-binding header for rk3036
clk: rockchip: add an id for rk3288 crypto clk
ARM: dts: rockchip: Add IR receiver to RK3288 Radxa Rock 2 Square
ARM: dts: rockchip: add channels properties for i2s
ARM: dts: rockchip: set system-power-controller property on rk3288-rock2
ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot
ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
-rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 04ea209f1737..d26143b58f21 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -53,6 +53,7 @@ interrupt-parent = <&gic>; aliases { + ethernet0 = &gmac; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; @@ -777,9 +778,23 @@ clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; pinctrl-names = "default"; pinctrl-0 = <&i2s0_bus>; + rockchip,playback-channels = <8>; + rockchip,capture-channels = <2>; status = "disabled"; }; + crypto: cypto-controller@ff8a0000 { + compatible = "rockchip,rk3288-crypto"; + reg = <0xff8a0000 0x4000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>, + <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>; + clock-names = "aclk", "hclk", "sclk", "apb_pclk"; + resets = <&cru SRST_CRYPTO>; + reset-names = "crypto-rst"; + status = "okay"; + }; + vopb: vop@ff930000 { compatible = "rockchip,rk3288-vop"; reg = <0xff930000 0x19c>; |