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| author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-05-30 23:57:05 -0500 |
|---|---|---|
| committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-05-30 23:57:05 -0500 |
| commit | 5bc65793cbf8da0d35f19ef025dda22887e79e80 (patch) | |
| tree | 8291998abd73055de6f487fafa174ee2a5d3afee /arch/arm/lib/bitops.h | |
| parent | 6edae708bf77e012d855a7e2c7766f211d234f4f (diff) | |
| parent | 3f0a6766e0cc5a577805732e5adb50a585c58175 (diff) | |
| download | linux-5bc65793cbf8da0d35f19ef025dda22887e79e80.tar.gz | |
[SCSI] Merge up to linux-2.6 head
Conflicts:
drivers/scsi/jazz_esp.c
Same changes made by both SCSI and SPARC trees: problem with UTF-8
conversion in the copyright.
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'arch/arm/lib/bitops.h')
| -rw-r--r-- | arch/arm/lib/bitops.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index 542251021744..2e787d40d599 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h @@ -47,7 +47,7 @@ * @store: store instruction * * Note: we can trivially conditionalise the store instruction - * to avoid dirting the data cache. + * to avoid dirtying the data cache. */ .macro testop, instr, store add r1, r1, r0, lsr #3 |