Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits)
  ARM: memblock: setup lowmem mappings using memblock
  ARM: memblock: move meminfo into find_limits directly
  ARM: memblock: convert free_highpages() to use memblock
  ARM: move freeing of highmem pages out of mem_init()
  ARM: memblock: convert memory detail printing to use memblock
  ARM: memblock: use memblock to free memory into arm_bootmem_init()
  ARM: memblock: use memblock when initializing memory allocators
  ARM: ensure membank array is always sorted
  ARM: 6466/1: implement flush_icache_all for the rest of the CPUs
  ARM: 6464/2: fix spinlock recursion in adjust_pte()
  ARM: fix memblock breakage
  ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type
  ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt
  ARM: 6449/1: Fix for compiler warning of uninitialized variable.
  ARM: 6445/1: fixup TCM memory types
  ARM: imx: Add wake functionality to GPIO
  ARM: mx5: Add gpio-keys to mx51 babbage board
  ARM: imx: Add gpio-keys to plat-mxc
  mx31_3ds: Fix spi registration
  mx31_3ds: Fix the logic for detecting the debug board
  ...

1 files changed, 50 insertions, 0 deletions

diff --git a/arch/arm/mach-s5pv310/include/mach/regs-srom.h b/arch/arm/mach-s5pv310/include/mach/regs-srom.h
new file mode 100644
index 000000000000..1898b3e10550
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/regs-srom.h
@@ -0,0 +1,50 @@
+/* linux/arch/arm/mach-s5pv310/include/mach/regs-srom.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * S5PV310 - SROMC register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_SROM_H
+#define __ASM_ARCH_REGS_SROM_H __FILE__
+
+#include <mach/map.h>
+
+#define S5PV310_SROMREG(x)	(S5P_VA_SROMC + (x))
+
+#define S5PV310_SROM_BW		S5PV310_SROMREG(0x0)
+#define S5PV310_SROM_BC0	S5PV310_SROMREG(0x4)
+#define S5PV310_SROM_BC1	S5PV310_SROMREG(0x8)
+#define S5PV310_SROM_BC2	S5PV310_SROMREG(0xc)
+#define S5PV310_SROM_BC3	S5PV310_SROMREG(0x10)
+
+/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
+
+#define S5PV310_SROM_BW__DATAWIDTH__SHIFT	0
+#define S5PV310_SROM_BW__ADDRMODE__SHIFT	1
+#define S5PV310_SROM_BW__WAITENABLE__SHIFT	2
+#define S5PV310_SROM_BW__BYTEENABLE__SHIFT	3
+
+#define S5PV310_SROM_BW__CS_MASK		0xf
+
+#define S5PV310_SROM_BW__NCS0__SHIFT		0
+#define S5PV310_SROM_BW__NCS1__SHIFT		4
+#define S5PV310_SROM_BW__NCS2__SHIFT		8
+#define S5PV310_SROM_BW__NCS3__SHIFT		12
+
+/* applies to same to BCS0 - BCS3 */
+
+#define S5PV310_SROM_BCX__PMC__SHIFT		0
+#define S5PV310_SROM_BCX__TACP__SHIFT		4
+#define S5PV310_SROM_BCX__TCAH__SHIFT		8
+#define S5PV310_SROM_BCX__TCOH__SHIFT		12
+#define S5PV310_SROM_BCX__TACC__SHIFT		16
+#define S5PV310_SROM_BCX__TCOS__SHIFT		24
+#define S5PV310_SROM_BCX__TACS__SHIFT		28
+
+#endif /* __ASM_ARCH_REGS_SROM_H */