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| author | Grant Likely <grant.likely@secretlab.ca> | 2012-02-27 14:04:40 -0700 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2012-02-27 14:04:40 -0700 |
| commit | 29f141fed01a09050207c4d41fc5811520d81146 (patch) | |
| tree | c55a51dca4a0e4da9fdc2b904eefbde37d2a5b03 /arch/arm/mm/Kconfig | |
| parent | 2261cc627f5453004042b4f694612edae27e492e (diff) | |
| parent | 14cd3c15cfc8118586262a79bfa3b3123f13e2c2 (diff) | |
| download | linux-29f141fed01a09050207c4d41fc5811520d81146.tar.gz | |
Merge branch 'fixes-for-grant' of git://sources.calxeda.com/kernel/linux into devicetree/merge
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 4cefb57d9ed2..7edef9121632 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -631,7 +631,8 @@ comment "Processor Features" config ARM_LPAE bool "Support for the Large Physical Address Extension" - depends on MMU && CPU_V7 + depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ + !CPU_32v4 && !CPU_32v3 help Say Y if you have an ARMv7 processor supporting the LPAE page table format and you would like to access memory beyond the @@ -882,6 +883,7 @@ config CACHE_XSC3L2 config ARM_L1_CACHE_SHIFT_6 bool + default y if CPU_V7 help Setting ARM L1 cache line size to 64 Bytes. |