diff options
| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2009-10-19 15:25:31 -0700 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2009-10-19 15:25:31 -0700 |
| commit | 233fd64e7f42a7b8e827ee02528474e0fabfebdc (patch) | |
| tree | 1fefbe2daf7c74a7112f00c8c2f8194bb75423c1 /arch/arm/plat-omap/include/mach/entry-macro.S | |
| parent | b0002e0e37de53782580a7587ad26b2131555653 (diff) | |
| download | linux-233fd64e7f42a7b8e827ee02528474e0fabfebdc.tar.gz | |
omap: Split OMAP2_IO_ADDRESS to L3 and L4
This patch splits OMAP2_IO_ADDRESS to OMAP2_L3_IO_ADDRESS and
OMAP2_L4_IO_ADDRESS to reclaim more IO space.
The omap_read*() and omap_write*() functions will work only over
L4 address space. Current omap kernel stack uses these functions
only to access registers over L4 io address space
Note that these macros should only be used when ioremap does
not work. Please use ioremap instead in all new code.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/plat-omap/include/mach/entry-macro.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index 3bad928c6315..2aea5665f58f 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S @@ -68,9 +68,9 @@ /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) -#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE) +#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) #elif defined(CONFIG_ARCH_OMAP34XX) -#define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE) +#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) #endif #if defined(CONFIG_ARCH_OMAP4) #include <mach/omap44xx.h> @@ -104,7 +104,7 @@ .endm #else -#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) +#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) /* * The interrupt numbering scheme is defined in the |