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| author | Anson Huang <Anson.Huang@nxp.com> | 2020-04-25 20:29:50 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-04-29 11:39:07 +0800 |
| commit | 8c30e7caac7467a89a69b22d1de7b489aa26b8a8 (patch) | |
| tree | a04a55151663f43f0c43f1cbe8056846b4c6933d /arch/arm64/boot/dts/freescale/imx8mn.dtsi | |
| parent | ac082ea87d9d6489ee26579e3cdad8d128495213 (diff) | |
| download | linux-8c30e7caac7467a89a69b22d1de7b489aa26b8a8.tar.gz | |
arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage
The latest datasheet Rev. 0.1, 03/2020 removes below constrain:
"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
So, for 1.2GHz setpoint VDD_ARM can use its typical voltage
directly.
The datasheet can be downloaded from below link:
https://www.nxp.com/docs/en/data-sheet/IMX8MNCEC.pdf
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index fa78f0163270..de6e2cfa8d1e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -121,7 +121,7 @@ opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <950000>; + opp-microvolt = <850000>; opp-supported-hw = <0xb00>, <0x7>; clock-latency-ns = <150000>; opp-suspend; |