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author | Lucas Stach <dev@lynxeye.de> | 2021-12-18 19:18:08 +0100 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2022-02-11 11:16:17 +0800 |
commit | 0bcc4bf063b2843a2e9897c0477f7ad4609ae06d (patch) | |
tree | 03c58baffa5d6da3809e76788173d7664ac1e6bd /arch/arm64/boot/dts/freescale/imx8mq.dtsi | |
parent | 58497d7a13ede30b1b2dea3ba7446472f9d4f411 (diff) | |
download | linux-0bcc4bf063b2843a2e9897c0477f7ad4609ae06d.tar.gz |
arm64: dts: imx8mq: disable DDRC node by default
Without a OPP table or a downstream TF-A running on the system the DDRC will
fail to probe, as it has no means to scale the DRAM frequency in that case.
This however will block the bus scaling driver to come up and this in turn
prevents other devices that hook into the interconnect from probing.
If the DDRC is disabled, the interconnect driver will simply ignore it. As
most systems don't want to scale the DRAM frequency, disable the node by
default and only enable it on the systems that actually uses this
capability and provides a valid OPP table in the DT.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 2df2510d0118..94d09dcf09b0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1579,6 +1579,7 @@ <&clk IMX8MQ_DRAM_PLL_OUT>, <&clk IMX8MQ_CLK_DRAM_ALT>, <&clk IMX8MQ_CLK_DRAM_APB>; + status = "disabled"; }; ddr-pmu@3d800000 { |