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| author | Tinghan Shen <tinghan.shen@mediatek.com> | 2022-08-11 10:58:06 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2022-08-25 16:47:57 +0200 |
| commit | 385e0eedb7ab8069894c59455892dd916acb4456 (patch) | |
| tree | 2b7edfdacc243b7058e5ccd9aea9be07dadbee40 /arch/arm64/boot/dts/mediatek | |
| parent | 2b515194bf0cb8f380586e96d2530a51b1878e6a (diff) | |
| download | linux-385e0eedb7ab8069894c59455892dd916acb4456.tar.gz | |
arm64: dts: mt8195: Add spmi node
Add spmi node to mt8195.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220811025813.21492-14-tinghan.shen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 7e77aecb1296..da2d976ff844 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -697,6 +697,21 @@ assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>; }; + spmi: spmi@10027000 { + compatible = "mediatek,mt8195-spmi"; + reg = <0 0x10027000 0 0x000e00>, + <0 0x10029000 0 0x000100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>, + <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_M_MST>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC>; + assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>; + }; + scp_adsp: clock-controller@10720000 { compatible = "mediatek,mt8195-scp_adsp"; reg = <0 0x10720000 0 0x1000>; |