diff options
| author | Guo Ren <guoren@linux.alibaba.com> | 2020-09-07 06:20:18 +0000 |
|---|---|---|
| committer | Guo Ren <guoren@linux.alibaba.com> | 2021-01-12 09:52:40 +0800 |
| commit | 0c8a32eed1625a65798286fb73fea8710a908545 (patch) | |
| tree | 69992b6e217f5e985ebbf1f739b2af336d89138c /arch/csky/kernel/smp.c | |
| parent | 7c53f6b671f4aba70ff15e1b05148b10d58c2837 (diff) | |
| download | linux-0c8a32eed1625a65798286fb73fea8710a908545.tar.gz | |
csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Diffstat (limited to 'arch/csky/kernel/smp.c')
| -rw-r--r-- | arch/csky/kernel/smp.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c index 041d0de6a1b6..0f9f5eef9338 100644 --- a/arch/csky/kernel/smp.c +++ b/arch/csky/kernel/smp.c @@ -203,8 +203,8 @@ volatile unsigned int secondary_hint; volatile unsigned int secondary_hint2; volatile unsigned int secondary_ccr; volatile unsigned int secondary_stack; - -unsigned long secondary_msa1; +volatile unsigned int secondary_msa1; +volatile unsigned int secondary_pgd; int __cpu_up(unsigned int cpu, struct task_struct *tidle) { @@ -216,6 +216,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle) secondary_hint2 = mfcr("cr<21, 1>"); secondary_ccr = mfcr("cr18"); secondary_msa1 = read_mmu_msa1(); + secondary_pgd = mfcr("cr<29, 15>"); /* * Because other CPUs are in reset status, we must flush data @@ -262,8 +263,6 @@ void csky_start_secondary(void) flush_tlb_all(); write_mmu_pagemask(0); - TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir); - TLBMISS_HANDLER_SETUP_PGD_KERNEL(swapper_pg_dir); #ifdef CONFIG_CPU_HAS_FPU init_fpu(); |