diff options
| author | Jim Quinlan <jim2101024@gmail.com> | 2021-12-09 15:47:23 -0500 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2022-01-11 11:55:41 +0100 |
| commit | 6fffb01e3b78ba3a38baf49c1dc7eeb5edfd5818 (patch) | |
| tree | cb87e0f44a4e56ed260b6aa94e4702223e83bcb1 /arch/mips/boot/dts/brcm/bcm7435.dtsi | |
| parent | 145790e55d82e30182f48b0b94149ba41e3aabcc (diff) | |
| download | linux-6fffb01e3b78ba3a38baf49c1dc7eeb5edfd5818.tar.gz | |
MIPS: bmips: Add support PCIe controller device nodes
For Broadcom STB PCIe HW. The 7425 and 7435 are MIPs-based SOCs. Not much
difference between the two for the DT properties except that they have
slightly different PCIe interrupt assignments.
Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/boot/dts/brcm/bcm7435.dtsi')
| -rw-r--r-- | arch/mips/boot/dts/brcm/bcm7435.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi index 8398b7f68bf4..8c001b944c8b 100644 --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi @@ -599,4 +599,34 @@ }; }; }; + + pcie_0: pcie@8b20000 { + status = "disabled"; + compatible = "brcm,bcm7435-pcie"; + + ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000 + 0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000 + 0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000 + 0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>; + + reg = <0x10410000 0x19310>; + aspm-no-l0s; + device_type = "pci"; + msi-controller; + msi-parent = <&pcie_0>; + #address-cells = <0x3>; + #size-cells = <0x2>; + bus-range = <0x0 0xff>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + linux,pci-domain = <0x0>; + + interrupt-parent = <&periph_intc>; + interrupts = <39>, <39>; + interrupt-names = "pcie", "msi"; + #interrupt-cells = <0x1>; + interrupt-map = <0 0 0 1 &periph_intc 0x23 + 0 0 0 1 &periph_intc 0x24 + 0 0 0 1 &periph_intc 0x25 + 0 0 0 1 &periph_intc 0x26>; + }; }; |