diff options
| author | Christoph Hellwig <hch@lst.de> | 2018-08-04 10:23:12 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2018-08-13 08:31:30 -0700 |
| commit | b9490350f751e5d17a24d0ae5af1f9e7f55c7c31 (patch) | |
| tree | fd0b8871c4c79a33885b709ed807fdcb29617952 /arch/riscv/kernel/smp.c | |
| parent | 5b5c2a2c44d7225ab3abbcc7e1881b97ea9872dd (diff) | |
| download | linux-b9490350f751e5d17a24d0ae5af1f9e7f55c7c31.tar.gz | |
RISC-V: remove timer leftovers
This code is currently unused and will be added back later in a different
place with the real interrupt and clocksource support.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/kernel/smp.c')
0 files changed, 0 insertions, 0 deletions