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| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 12:17:40 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 12:17:40 -0700 |
| commit | 5b6b54982258c330247957a8d877b9851ac69d53 (patch) | |
| tree | 567e4b3391e0c6689cf511789fb512ef7385c16f /arch/sh/drivers/pci/pci-sh7780.h | |
| parent | 35c74823cb382c610be908f1b92f980b84e7c37c (diff) | |
| parent | 39374aadcd0159b4744ab456f4efa100bea84bd4 (diff) | |
| download | linux-5b6b54982258c330247957a8d877b9851ac69d53.tar.gz | |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (38 commits)
sh: R7785RP board updates.
sh: Update r7780rp defconfig.
sh: Add die chain notifiers.
sh: Fix APM emulation on hp6xx.
sh: Wire up more IRQs for SH7709.
sh: Solution Engine 7722 board support.
sh: Fix r7780rp build.
sh: kdump support.
sh: Move clock reporting to its own proc entry.
sh: Solution Engine SH7705 board and CPU updates.
serial: sh-sci: Fix module clock refcount for serial console.
serial: sh-sci: Fix module clock refcounting.
sh: SH7722 clock framework support.
sh: hp6xx pata_platform support.
sh: Obey CONFIG_HZ for HZ definition.
sh: Fix fstatat64() syscall.
sh: se7780 PCI support.
sh: SH7780 Solution Engine board support.
sh: Add a dummy SH-4 PCIC fixup.
sh: Tidy up L-BOX area5 addresses.
...
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh7780.h')
| -rw-r--r-- | arch/sh/drivers/pci/pci-sh7780.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index f02d2180a4bc..00d12d0f8c1f 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h @@ -14,8 +14,9 @@ /* Platform Specific Values */ #define SH7780_VENDOR_ID 0x1912 -#define SH7780_DEVICE_ID 0x0002 #define SH7781_DEVICE_ID 0x0001 +#define SH7780_DEVICE_ID 0x0002 +#define SH7785_DEVICE_ID 0x0007 /* SH7780 Control Registers */ #define SH7780_PCI_VCR0 0xFE000000 @@ -65,6 +66,22 @@ #define SH7780_PCIPMCSR_BSE 0x046 #define SH7780_PCICDD 0x047 +#define SH7780_PCICR 0x100 /* PCI Control Register */ +#define SH7780_PCILSR 0x104 /* PCI Local Space Register0 */ +#define SH7780_PCILSR1 0x108 /* PCI Local Space Register1 */ +#define SH7780_PCILAR0 0x10C /* PCI Local Address Register1 */ +#define SH7780_PCILAR1 0x110 /* PCI Local Address Register1 */ +#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */ +#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */ +#define SH7780_PCIAIR 0x11C /* Error Address Register */ +#define SH7780_PCICIR 0x120 /* Error Command/Data Register */ +#define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */ +#define SH7780_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ +#define SH7780_PCIBMIR 0x138 /* Error Bus Master Register */ +#define SH7780_PCIPAR 0x1C0 /* PIO Address Register */ +#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */ +#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */ + #define SH7780_PCIMBR0 0x1E0 #define SH7780_PCIMBMR0 0x1E4 #define SH7780_PCIMBR2 0x1F0 |