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| author | David S. Miller <davem@davemloft.net> | 2010-02-28 19:23:06 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-02-28 19:23:06 -0800 |
| commit | 47871889c601d8199c51a4086f77eebd77c29b0b (patch) | |
| tree | 40cdcac3bff0ee40cc33dcca61d0577cdf965f77 /arch/sh/kernel/cpu/sh4a/clock-sh7724.c | |
| parent | c16cc0b464b8876cfd57ce1c1dbcb6f9a6a0bce3 (diff) | |
| parent | 30ff056c42c665b9ea535d8515890857ae382540 (diff) | |
| download | linux-47871889c601d8199c51a4086f77eebd77c29b0b.tar.gz | |
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Conflicts:
drivers/firmware/iscsi_ibft.c
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/clock-sh7724.c')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 9db743802f06..6707061fbf54 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c @@ -127,13 +127,28 @@ struct clk *main_clks[] = { &div3_clk, }; +static void div4_kick(struct clk *clk) +{ + unsigned long value; + + /* set KICK bit in FRQCRA to update hardware setting */ + value = __raw_readl(FRQCRA); + value |= (1 << 31); + __raw_writel(value, FRQCRA); +} + static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; -static struct clk_div_mult_table div4_table = { +static struct clk_div_mult_table div4_div_mult_table = { .divisors = divisors, .nr_divisors = ARRAY_SIZE(divisors), }; +static struct clk_div4_table div4_table = { + .div_mult_table = &div4_div_mult_table, + .kick = div4_kick, +}; + enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; #define DIV4(_str, _reg, _bit, _mask, _flags) \ @@ -144,7 +159,7 @@ struct clk div4_clks[DIV4_NR] = { [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT), [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT), [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0), - [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, 0), + [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), }; struct clk div6_clks[] = { |