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authorTony Luck <tony.luck@intel.com>2016-02-17 10:20:13 -0800
committerIngo Molnar <mingo@kernel.org>2016-02-18 09:28:47 +0100
commit0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be (patch)
tree4aa087d9a71e7f27655d43d0a46555efd856ecf6 /arch/x86/include/asm/mce.h
parent3a2f2ac9b96f9a9f5538396a212d3b9fb543bfc5 (diff)
downloadlinux-0f68c088c0adb3c3bbeb487c4ebcde91fd5d34be.tar.gz
x86/cpufeature: Create a new synthetic cpu capability for machine check recovery
The Intel Software Developer Manual describes bit 24 in the MCG_CAP MSR: MCG_SER_P (software error recovery support present) flag, bit 24 — Indicates (when set) that the processor supports software error recovery But only some models with this capability bit set will actually generate recoverable machine checks. Check the model name and set a synthetic capability bit. Provide a command line option to set this bit anyway in case the kernel doesn't recognise the model name. Signed-off-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Borislav Petkov <bp@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/2e5bfb23c89800a036fb8a45fa97a74bb16bc362.1455732970.git.tony.luck@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/mce.h')
-rw-r--r--arch/x86/include/asm/mce.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 2ea4527e462f..18d2ba9c8e44 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -113,6 +113,7 @@ struct mca_config {
bool ignore_ce;
bool disabled;
bool ser;
+ bool recovery;
bool bios_cmci_threshold;
u8 banks;
s8 bootlog;