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| author | Thomas Gleixner <tglx@linutronix.de> | 2019-02-14 22:26:50 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2019-02-14 22:26:50 +0100 |
| commit | d869f86645fc07dc83b89b68f1a22d91ebe29439 (patch) | |
| tree | a3c2c1167bb34c8d0367d77e1a5734fc842d9f30 /drivers/clk/socfpga/clk-pll-s10.c | |
| parent | 030fc443aef663df71cd834331fd8f1ec10c30c0 (diff) | |
| parent | 74e96711e3379fc66630f2a1d184947f80cf2c48 (diff) | |
| download | linux-d869f86645fc07dc83b89b68f1a22d91ebe29439.tar.gz | |
Merge branch 'linus' into irq/core
Pick up upstream changes to avoid conflicts for pending patches.
Diffstat (limited to 'drivers/clk/socfpga/clk-pll-s10.c')
| -rw-r--r-- | drivers/clk/socfpga/clk-pll-s10.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index 2d5d8b43727e..c4d0b6f6abf2 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -43,7 +43,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, /* Read mdiv and fdiv from the fdbck register */ reg = readl(socfpgaclk->hw.reg + 0x4); mdiv = (reg & SOCFPGA_PLL_MDIV_MASK) >> SOCFPGA_PLL_MDIV_SHIFT; - vco_freq = (unsigned long long)parent_rate * (mdiv + 6); + vco_freq = (unsigned long long)vco_freq * (mdiv + 6); return (unsigned long)vco_freq; } |