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| author | Icenowy Zheng <icenowy@aosc.io> | 2017-05-15 00:30:34 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-06-07 15:32:12 +0200 |
| commit | 763c5bd045b1098be444142403398f1414fd42fb (patch) | |
| tree | be40aad1e47035b478bc8f13d845a759731620c9 /drivers/clk/sunxi-ng/ccu_reset.h | |
| parent | ed74f8a8a67952320277a53a0c46a0cdf44fbe8f (diff) | |
| download | linux-763c5bd045b1098be444142403398f1414fd42fb.tar.gz | |
clk: sunxi-ng: add support for DE2 CCU
The "Display Engine 2.0" in Allwinner newer SoCs contains a clock
management unit for its subunits, like the DE CCU in A80.
Add a sunxi-ng style driver for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_reset.h')
0 files changed, 0 insertions, 0 deletions