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authorRalf Baechle <ralf@linux-mips.org>2012-09-27 18:07:25 +0200
committerRalf Baechle <ralf@linux-mips.org>2012-09-27 18:07:25 +0200
commit35a041e77ab5faad7916b8f77fae0b34b9fa7878 (patch)
treed1ea4e68087d5d4b1c64e1aa6f5833aadfe41645 /drivers/gpio/gpio-stp-xway.c
parente33fd70baea1032a62b1a2a051ea4c07a1aaa402 (diff)
parentc9e854cf940fbc09846c255895efceb3bc9bf095 (diff)
downloadlinux-35a041e77ab5faad7916b8f77fae0b34b9fa7878.tar.gz
Merge branch 'lantiq' of git://dev.phrozen.org/mips-next into mips-for-linux-next
Diffstat (limited to 'drivers/gpio/gpio-stp-xway.c')
-rw-r--r--drivers/gpio/gpio-stp-xway.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c
index e35096bf3cfb..8bead0bb6459 100644
--- a/drivers/gpio/gpio-stp-xway.c
+++ b/drivers/gpio/gpio-stp-xway.c
@@ -82,7 +82,7 @@ struct xway_stp {
struct gpio_chip gc;
void __iomem *virt;
u32 edge; /* rising or falling edge triggered shift register */
- u16 shadow; /* shadow the shift registers state */
+ u32 shadow; /* shadow the shift registers state */
u8 groups; /* we can drive 1-3 groups of 8bit each */
u8 dsl; /* the 2 LSBs can be driven by the dsl core */
u8 phy1; /* 3 bits can be driven by phy1 */