diff options
| author | Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2021-08-12 09:50:24 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-08-16 16:14:12 -0400 |
| commit | 961606872a28f0390dd841cbf68285421a651d8d (patch) | |
| tree | 93423109eae34a7406f1097789c6e5d76ba89c98 /drivers/gpu/drm/amd/display | |
| parent | f586fea897609a61020a4438ee45542ad848abe9 (diff) | |
| download | linux-961606872a28f0390dd841cbf68285421a651d8d.tar.gz | |
drm/amd/display: Guard vblank wq flush with DCN guards
[Why]
Compilation of the workqueue fails if not building with the DCN config
option set.
[How]
Guard calls to the flush with the DCN config option to fix the build.
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index cebd663b6708..816723691d51 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -8643,11 +8643,13 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, /* Update the planes if changed or disable if we don't have any. */ if ((planes_count || acrtc_state->active_planes == 0) && acrtc_state->stream) { +#if defined(CONFIG_DRM_AMD_DC_DCN) /* * If PSR or idle optimizations are enabled then flush out * any pending work before hardware programming. */ flush_workqueue(dm->vblank_control_workqueue); +#endif bundle->stream_update.stream = acrtc_state->stream; if (new_pcrtc_state->mode_changed) { @@ -8980,7 +8982,9 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) if (dc_state) { /* if there mode set or reset, disable eDP PSR */ if (mode_set_reset_required) { +#if defined(CONFIG_DRM_AMD_DC_DCN) flush_workqueue(dm->vblank_control_workqueue); +#endif amdgpu_dm_psr_disable_all(dm); } |