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author | Chris Wilson <chris@chris-wilson.co.uk> | 2014-04-02 16:36:07 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-04-03 17:16:45 +0200 |
commit | 9991ae787a0c87fe7c783b4b6f4754c3cdbb6213 (patch) | |
tree | cddcf373cf7540e5f486b0c15d61c9e0e32168f2 /drivers/gpu/drm/i915/i915_reg.h | |
parent | 057f6a8ad7691d028681ba443d7f5e482a6a80a4 (diff) | |
download | linux-9991ae787a0c87fe7c783b4b6f4754c3cdbb6213.tar.gz |
drm/i915: Move all ring resets before setting the HWS page
In commit a51435a3137ad8ae75c288c39bd2d8b2696bae8f
Author: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com>
Date: Wed Mar 12 16:39:40 2014 +0530
drm/i915: disable rings before HW status page setup
we reordered stopping the rings to do so before we set the HWS register.
However, there is an extra workaround for g45 to reset the rings twice,
and for consistency we should apply that workaround before setting the
HWS to be sure that the rings are truly stopped.
Cc: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b50c92a63d04..23153668dacc 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -915,6 +915,7 @@ enum punit_power_well { # define MI_FLUSH_ENABLE (1 << 12) # define ASYNC_FLIP_PERF_DISABLE (1 << 14) # define MODE_IDLE (1 << 9) +# define STOP_RING (1 << 8) #define GEN6_GT_MODE 0x20d0 #define GEN7_GT_MODE 0x7008 |