diff options
| author | Manasi Navare <manasi.d.navare@intel.com> | 2018-06-11 15:26:55 -0700 |
|---|---|---|
| committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-06-14 14:58:22 -0700 |
| commit | 2edd53272120ea3fd32193ef7f921580a534e218 (patch) | |
| tree | 92be34dd73f7613d1e13666114583aa155a8be5c /drivers/gpu/drm/i915/intel_drv.h | |
| parent | 46b527d19c4327897197d09748a8b332e322a1d7 (diff) | |
| download | linux-2edd53272120ea3fd32193ef7f921580a534e218.tar.gz | |
drm/i915/dp: Add support for HBR3 and TPS4 during link training
DP spec 1.4 supports training pattern set 4 (TPS4) for HBR3 link
rate. This will be used in link training's channel equalization
phase if supported by both source and sink.
This patch adds the helpers to check if HBR3 is supported and uses
TPS4 in training pattern selection during link training.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180611222655.5696-2-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 8641583842be..fd2e4de77697 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1715,6 +1715,7 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing); void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, uint8_t *link_bw, uint8_t *rate_select); bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); +bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); bool intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]); |