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| author | Maxime Ripard <maxime@cerno.tech> | 2020-09-03 10:00:47 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-09-07 18:02:57 +0200 |
| commit | 649abf2f5d328a5a19824f712987f0a1de095332 (patch) | |
| tree | 753de0b8a9275588a907c380817ad2d5d20a34f3 /drivers/gpu/drm/vc4/vc4_drv.h | |
| parent | 87ebcd42fb7b8d1d3269007a621e41ae96a0077e (diff) | |
| download | linux-649abf2f5d328a5a19824f712987f0a1de095332.tar.gz | |
drm/vc4: crtc: Add FIFO depth to vc4_crtc_data
Not all pixelvalve FIFOs in vc5 have the same depth, so we need to add that
to our vc4_crtc_data structure to be able to compute the fill level
properly later on.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/7df3549c1bea9b0a27c784dc416bb9a831e4e18f.1599120059.git-series.maxime@cerno.tech
Diffstat (limited to 'drivers/gpu/drm/vc4/vc4_drv.h')
| -rw-r--r-- | drivers/gpu/drm/vc4/vc4_drv.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index 9e81ad8331f1..179010b9a010 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -457,6 +457,9 @@ struct vc4_crtc_data { struct vc4_pv_data { struct vc4_crtc_data base; + /* Depth of the PixelValve FIFO in bytes */ + unsigned int fifo_depth; + /* Number of pixels output per clock period */ u8 pixels_per_clock; |