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| author | Lu Baolu <baolu.lu@linux.intel.com> | 2022-09-26 21:15:25 +0800 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2022-09-26 15:52:24 +0200 |
| commit | 0faa19a1515f8b04e9251b38ba522529906aeda7 (patch) | |
| tree | 0833bb29a63a8f9e6a44f81d89837a2374704fbe /drivers/iommu/intel/iommu.h | |
| parent | 06f4b8d09dbabec631ed7b033f5d5413d86c7134 (diff) | |
| download | linux-0faa19a1515f8b04e9251b38ba522529906aeda7.tar.gz | |
iommu/vt-d: Decouple PASID & PRI enabling from SVA
Previously the PCI PASID and PRI capabilities are enabled in the path of
iommu device probe only if INTEL_IOMMU_SVM is configured and the device
supports ATS. As we've already decoupled the I/O page fault handler from
SVA, we could also decouple PASID and PRI enabling from it to make room
for growth of new features like kernel DMA with PASID, SIOV and nested
translation.
At the same time, the iommu_enable_dev_iotlb() helper is also called in
iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) path. It's unnecessary
and duplicate. This cleanups this helper to make the code neat.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20220915085814.2261409-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/intel/iommu.h')
| -rw-r--r-- | drivers/iommu/intel/iommu.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index b5fb7706e97c..8f29a183467d 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -742,7 +742,6 @@ extern int dmar_ir_support(void); void *alloc_pgtable_page(int node); void free_pgtable_page(void *vaddr); void iommu_flush_write_buffer(struct intel_iommu *iommu); -int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct device *dev); struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn); #ifdef CONFIG_INTEL_IOMMU_SVM |