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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2007-05-30 23:57:05 -0500
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2007-05-30 23:57:05 -0500
commit5bc65793cbf8da0d35f19ef025dda22887e79e80 (patch)
tree8291998abd73055de6f487fafa174ee2a5d3afee /include/asm-arm/arch-ixp4xx/nslu2.h
parent6edae708bf77e012d855a7e2c7766f211d234f4f (diff)
parent3f0a6766e0cc5a577805732e5adb50a585c58175 (diff)
downloadlinux-5bc65793cbf8da0d35f19ef025dda22887e79e80.tar.gz
[SCSI] Merge up to linux-2.6 head
Conflicts: drivers/scsi/jazz_esp.c Same changes made by both SCSI and SPARC trees: problem with UTF-8 conversion in the copyright. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'include/asm-arm/arch-ixp4xx/nslu2.h')
-rw-r--r--include/asm-arm/arch-ixp4xx/nslu2.h46
1 files changed, 12 insertions, 34 deletions
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h
index 6b437f7c9955..850fdc5b45da 100644
--- a/include/asm-arm/arch-ixp4xx/nslu2.h
+++ b/include/asm-arm/arch-ixp4xx/nslu2.h
@@ -9,7 +9,7 @@
* based on ixdp425.h:
* Copyright 2004 (c) MontaVista, Software, Inc.
*
- * This file is licensed under the terms of the GNU General Public
+ * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
@@ -34,36 +34,14 @@
#define NSLU2_PCI_INTC_PIN 9
#define NSLU2_PCI_INTD_PIN 8
-
/* NSLU2 Timer */
#define NSLU2_FREQ 66000000
-#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
-#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
-
-/* GPIO */
-
-#define NSLU2_GPIO0 0
-#define NSLU2_GPIO1 1
-#define NSLU2_GPIO2 2
-#define NSLU2_GPIO3 3
-#define NSLU2_GPIO4 4
-#define NSLU2_GPIO5 5
-#define NSLU2_GPIO6 6
-#define NSLU2_GPIO7 7
-#define NSLU2_GPIO8 8
-#define NSLU2_GPIO9 9
-#define NSLU2_GPIO10 10
-#define NSLU2_GPIO11 11
-#define NSLU2_GPIO12 12
-#define NSLU2_GPIO13 13
-#define NSLU2_GPIO14 14
-#define NSLU2_GPIO15 15
/* Buttons */
-#define NSLU2_PB_GPIO NSLU2_GPIO5
-#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */
-#define NSLU2_RB_GPIO NSLU2_GPIO12
+#define NSLU2_PB_GPIO 5
+#define NSLU2_PO_GPIO 8 /* power off */
+#define NSLU2_RB_GPIO 12
#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
@@ -79,16 +57,16 @@
/* LEDs */
-#define NSLU2_LED_RED NSLU2_GPIO0
-#define NSLU2_LED_GRN NSLU2_GPIO1
+#define NSLU2_LED_RED_GPIO 0
+#define NSLU2_LED_GRN_GPIO 1
-#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED)
-#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN)
+#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED_GPIO)
+#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN_GPIO)
-#define NSLU2_LED_DISK1 NSLU2_GPIO3
-#define NSLU2_LED_DISK2 NSLU2_GPIO2
+#define NSLU2_LED_DISK1_GPIO 3
+#define NSLU2_LED_DISK2_GPIO 2
-#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2)
-#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3)
+#define NSLU2_LED_DISK1_BM (1L << NSLU2_LED_DISK1_GPIO)
+#define NSLU2_LED_DISK2_BM (1L << NSLU2_LED_DISK2_GPIO)