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author | Carlo Caione <ccaione@baylibre.com> | 2022-12-19 10:02:38 +0100 |
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committer | Neil Armstrong <neil.armstrong@linaro.org> | 2023-01-02 11:02:08 +0100 |
commit | 77772e607522daa61f3af74df018559db75c43d6 (patch) | |
tree | 754efc0568222e8f0c8959f0b05fce74de6111c8 /usr | |
parent | e9c7cfe7b71d26ee4a9f17192632f3d0ff246001 (diff) | |
download | linux-77772e607522daa61f3af74df018559db75c43d6.tar.gz |
drm/tiny: ili9486: Do not assume 8-bit only SPI controllers
The pixel data for the ILI9486 is always 16-bits wide and it must be
sent over the SPI bus. When the controller is only able to deal with
8-bit transfers, this 16-bits data needs to be swapped before the
sending to account for the big endian bus, this is on the contrary not
needed when the SPI controller already supports 16-bits transfers.
The decision about swapping the pixel data or not is taken in the MIPI
DBI code by probing the controller capabilities: if the controller only
suppors 8-bit transfers the data is swapped, otherwise it is not.
This swapping/non-swapping is relying on the assumption that when the
controller does support 16-bit transactions then the data is sent
unswapped in 16-bits-per-word over SPI.
The problem with the ILI9486 driver is that it is forcing 8-bit
transactions also for controllers supporting 16-bits, violating the
assumption and corrupting the pixel data.
Align the driver to what is done in the MIPI DBI code by adjusting the
transfer size to the maximum allowed by the SPI controller.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20221116-s905x_spi_ili9486-v4-2-f86b4463b9e4@baylibre.com
Diffstat (limited to 'usr')
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