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authorSimon Horman <horms+renesas@verge.net.au>2018-01-17 17:17:07 +0100
committerSimon Horman <horms+renesas@verge.net.au>2018-02-12 13:50:56 +0100
commitbb21803ea44076525a97e8a247acfa442b2bf115 (patch)
treec353af4c81dc99bccfe44910ac5c07bbea3a3732 /usr
parent5025c78b3b69914d4da8e75cf2390329cf04ca95 (diff)
downloadlinux-bb21803ea44076525a97e8a247acfa442b2bf115.tar.gz
ARM: dts: r8a7791: add soc node
Add soc node to represent the bus and move all nodes with a base address into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car Gen2 SoCs to this scheme. The ordering is derived from simply moving each node with an address up to before any nodes without a base address that occur before the soc node. To improve maintainability follow-up patches will sort subnodes of both the new soc node and the root node. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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