diff options
Diffstat (limited to 'drivers/clk/meson')
| -rw-r--r-- | drivers/clk/meson/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/clk/meson/gxbb.c | 6 |
2 files changed, 4 insertions, 3 deletions
diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 4a806203b73c..5588f75a8414 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -14,6 +14,7 @@ config COMMON_CLK_MESON8B config COMMON_CLK_GXBB bool depends on COMMON_CLK_AMLOGIC + select RESET_CONTROLLER help Support for the clock controller on AmLogic S905 devices, aka gxbb. Say Y if you want peripherals and CPU frequency scaling to work. diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index f4117a368aa1..a897ea45327c 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -704,7 +704,7 @@ static struct clk_gate gxbb_sar_adc_clk = { */ static u32 mux_table_mali_0_1[] = {0, 1, 2, 3, 4, 5, 6, 7}; -static const char *gxbb_mali_0_1_parent_names[] = { +static const char * const gxbb_mali_0_1_parent_names[] = { "xtal", "gp0_pll", "mpll2", "mpll1", "fclk_div7", "fclk_div4", "fclk_div3", "fclk_div5" }; @@ -804,7 +804,7 @@ static struct clk_gate gxbb_mali_1 = { }; static u32 mux_table_mali[] = {0, 1}; -static const char *gxbb_mali_parent_names[] = { +static const char * const gxbb_mali_parent_names[] = { "mali_0", "mali_1" }; @@ -956,7 +956,7 @@ static struct clk_gate gxbb_32k_clk = { }, }; -static const char *gxbb_32k_clk_parent_names[] = { +static const char * const gxbb_32k_clk_parent_names[] = { "xtal", "cts_slow_oscin", "fclk_div3", "fclk_div5" }; |