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* ARM: 6246/1: mmci: support larger MMCIDATALENGTH registerRabin Vincent2010-07-291-3/+9
| | | | | | | | | The Ux500 variant has a 24-bit MMCIDATALENGTH register, as opposed to the 16-bit one on the ARM version. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6245/1: mmci: enable hardware flow control on Ux500 variantsRabin Vincent2010-07-292-4/+6
| | | | | | | | | Although both the U300 and Ux500 use ST variants, the HWFCEN bits are at different positions, so use the variant_data to store the information. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6244/1: mmci: add variant data and default MCICLOCK supportRabin Vincent2010-07-292-1/+32
| | | | | | | | | | | Add a variant_data structure to handle the differences between the various variants of this peripheral. Add a first quirk for a default MCICLOCK value, required on the Ux500 variant where the enable bit needs to be always set, since it controls access to some registers. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6243/1: mmci: pass power_mode to the translate_vdd callbackRabin Vincent2010-07-292-14/+9
| | | | | | | | | | Platforms may have some external power control which need to be controlled from board specific code. Rename the translate_vdd() callback to vdd_handler() and pass it the power mode. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6239/1: mmci: let core poll for card detectionRabin Vincent2010-07-271-21/+1
| | | | | | | | | | Use the MMC core's ability to poll for card detection. This also has the advantage of doing the gpio_get_value from a workqueue instead of timer, allowing the gpio to be on a sleeping gpiochip. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6238/1: mmci: fix multi block transfersRabin Vincent2010-07-271-1/+1
| | | | | | | | Fix the data transfer size to allow multi block transfers to work. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6237/1: mmci: use sg_miter API to fix multi-page sg handlingRabin Vincent2010-07-272-56/+39
| | | | | | | | | | | The mmci driver's SG list iteration logic assumes that each SG entry spans only one page, and only maps and flushes one page of the sg. This is not a valid assumption. Fix it by converting the driver to the sg_miter API, which correctly handles sgs which span multiple pages. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: Fix section build warnings for AMBA driversRussell King2010-07-274-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Found in the Versatile build: WARNING: drivers/built-in.o(.data+0x14c): Section mismatch in reference from the variable pl061_gpio_driver to the (unknown reference) .init.data:(unknown) The variable pl061_gpio_driver references the (unknown reference) __initdata (unknown) WARNING: drivers/built-in.o(.data+0x40f8): Section mismatch in reference from the variable pl011_driver to the (unknown reference) .init.data:(unknown) The variable pl011_driver references the (unknown reference) __initdata (unknown) WARNING: drivers/built-in.o(.data+0x5ab4): Section mismatch in reference from the variable pl031_driver to the (unknown reference) .init.data:(unknown) The variable pl031_driver references the (unknown reference) __initdata (unknown) Basically, amba_id structures must not be __initdata. Also fix: WARNING: drivers/built-in.o(.data+0x138): Section mismatch in reference from the variable pl061_gpio_driver to the function .init.text:pl061_probe() The variable pl061_gpio_driver references the function __init pl061_probe() which is an incorrectly annotated probe function. Fix it to reflect the other AMBA bus probe functions by removing the __init attributation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: call machine_shutdown() from machine_halt(), etcRussell King2010-07-273-9/+18
| | | | | | | | | | | | | | x86 calls machine_shutdown() from the various machine_*() calls which take the machine down ready for halting, restarting, etc, and uses this to bring the system safely to a point where those actions can be performed. Such actions are stopping the secondary CPUs. So, change the ARM implementation of these to reflect what x86 does. This solves kexec problems on ARM SMP platforms, where the secondary CPUs were left running across the kexec call. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: SMP: Always enable clock event broadcast supportRussell King2010-07-273-3/+8
| | | | | | | | | | | | | | | | The TWD local timers are unable to wake up the CPU when it is placed into a low power mode, eg. C3. Therefore, we need to adapt things such that the TWD code can cope with this. We do this by always providing a broadcast tick function, and marking the fact that the TWD local timer will stop in low power modes. This means that when the CPU is placed into a low power mode, the core timer code marks this fact, and allows an IPI to be given to the core. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
* ARM: Factor out common code from cpu_proc_fin()Russell King2010-07-2726-124/+40
| | | | | | | | | | | | | | All implementations of cpu_proc_fin() start by disabling interrupts and then flush caches. Rather than have every processors proc_fin() implementation do this, move it out into generic code - and move the cache flush past setup_mm_for_reboot() (so it can benefit from having caches still enabled.) This allows cpu_proc_fin() to become independent of the L1/L2 cache types, and eventually move the L2 cache flushing into the L2 support code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6268/1: ARMv6K and ARMv7 use fault statuses 3 and 6 as Access Flag faultKirill A. Shutemov2010-07-272-2/+23
| | | | | | | | | | | | Statuses 3 (0b00011) and 6 (0x00110) of DFSR are Access Flags faults on ARMv6K and ARMv7. Let's patch fsr_info[] at runtime if we are on ARMv7 or later. Unfortunately, we don't have runtime check for 'K' extension, so we can't check for it. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6256/1: Check arch version and modify fsr_info[] depends on it at runtimeKirill A. Shutemov2010-07-271-5/+11
| | | | | Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6255/1: Workaround infinity loop in handling of translation faultsKirill A. Shutemov2010-07-271-1/+10
| | | | | | | | | | | | On ARM one Linux PGD entry contains two hardware entries (see page tables layout in pgtable.h). We normally guarantee that we always fill both L1 entries. But create_mapping() doesn't follow the rule. It can create inidividual L1 entries, so here we have to call pmd_none() check in do_translation_fault() for the entry really corresponded to address, not for the first of pair. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6269/1: Add 'code' parameter for hook_fault_code()Kirill A. Shutemov2010-07-2710-20/+25
| | | | | | | | Add one more parameter to hook_fault_code() to be able to set 'code' field of struct fsr_info. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6252/1: Use SIGBUS for unaligned access instead of SIGILLKirill A. Shutemov2010-07-272-4/+4
| | | | | | | | POSIX specify to use signal SIGBUS with code BUS_ADRALN for invalid address alignment. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6251/1: Make SPARSE_IRQ a hidden optioneric miao2010-07-271-4/+1
| | | | | | | | SPARSE_IRQ doesn't need to be a visible option, only those platforms supporting that will select it. Signed-off-by: Eric Miao <eric.miao@canonical.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: DMA coherent allocator: align remapped addressesRussell King2010-07-273-4/+18
| | | | | | | | | | | | | | | The DMA coherent remap area is used to provide an uncached mapping of memory for coherency with DMA engines. Currently, we look for any free hole which our allocation will fit in with page alignment. However, this can lead to fragmentation of the area, and allows small allocations to cross L1 entry boundaries. This is undesirable as we want to move towards allocating sections of memory. Align allocations according to the size, limiting the alignment between the page and section sizes. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: use generic ioremap_page_range()Russell King2010-07-271-70/+4
| | | | | | | We don't need our own implementation of this, use the generic library implementation instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6158/2: PL011 baudrate extension for ST-Ericssons derivativeLinus Walleij2010-07-272-2/+26
| | | | | | | | | | | | | | | | Implementation of the ST-Ericsson baudrate extension in the PL011 block. In this modified variant it is possible to change the sampling factor from 16 to 8, and thanks to this we can get higher baudrates while still using the same peripheral clock. Also replace the simple division to determine the baud divisor with DIV_ROUND_CLOSEST() rather than a simple integer division. Cc: Alessandro Rubini <rubini@unipv.it> Cc: Jerzy Kasenberg <jerzy.kasenberg@tieto.com> Signed-off-by: Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6157/2: PL011 TX/RX split of LCR for ST-Ericssons derivativeLinus Walleij2010-07-272-11/+52
| | | | | | | | | | In the ST-Ericsson version of the PL011 the TX and RX have different control registers. Cc: Alessandro Rubini <rubini@unipv.it> Signed-off-by: Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6213/1: atomic64_test: add ARM as supported architectureWill Deacon2010-07-271-1/+1
| | | | | | | | | ARM has support for the atomic64_dec_if_positive operation so ensure that it is tested by the atomic64_test routine. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'origin' into miscRussell King2010-07-27852-200622/+8422
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| * Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-07-148-93/+243
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6226/1: fix kprobe bug in ldr instruction emulation ARM: Update mach-types ARM: lockdep: fix unannotated irqs-on ARM: 6184/2: ux500: use neutral PRCMU base ARM: 6212/1: atomic ops: add memory constraints to inline asm ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL
| | * ARM: 6226/1: fix kprobe bug in ldr instruction emulationNicolas Pitre2010-07-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | From: Bin Yang <bin.yang@marvell.com> Cc: stable@kernel.org Signed-off-by: Bin Yang <bin.yang@marvell.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: Update mach-typesRussell King2010-07-121-3/+149
| | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: lockdep: fix unannotated irqs-onRussell King2010-07-102-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU: Testing write buffer coherency: ok ------------[ cut here ]------------ WARNING: at kernel/lockdep.c:3145 check_flags+0xcc/0x1dc() Modules linked in: [<c0035120>] (unwind_backtrace+0x0/0xf8) from [<c0355374>] (dump_stack+0x20/0x24) [<c0355374>] (dump_stack+0x20/0x24) from [<c0060c04>] (warn_slowpath_common+0x58/0x70) [<c0060c04>] (warn_slowpath_common+0x58/0x70) from [<c0060c3c>] (warn_slowpath_null+0x20/0x24) [<c0060c3c>] (warn_slowpath_null+0x20/0x24) from [<c008f224>] (check_flags+0xcc/0x1dc) [<c008f224>] (check_flags+0xcc/0x1dc) from [<c00945dc>] (lock_acquire+0x50/0x140) [<c00945dc>] (lock_acquire+0x50/0x140) from [<c0358434>] (_raw_spin_lock+0x50/0x88) [<c0358434>] (_raw_spin_lock+0x50/0x88) from [<c00fd114>] (set_task_comm+0x2c/0x60) [<c00fd114>] (set_task_comm+0x2c/0x60) from [<c007e184>] (kthreadd+0x30/0x108) [<c007e184>] (kthreadd+0x30/0x108) from [<c0030104>] (kernel_thread_exit+0x0/0x8) ---[ end trace 1b75b31a2719ed1c ]--- possible reason: unannotated irqs-on. irq event stamp: 3 hardirqs last enabled at (2): [<c0059bb0>] finish_task_switch+0x48/0xb0 hardirqs last disabled at (3): [<c002f0b0>] ret_slow_syscall+0xc/0x1c softirqs last enabled at (0): [<c005f3e0>] copy_process+0x394/0xe5c softirqs last disabled at (0): [<(null)>] (null) Fix this by ensuring that the lockdep interrupt state is manipulated in the appropriate places. We essentially treat userspace as an entirely separate environment which isn't relevant to lockdep (lockdep doesn't monitor userspace.) We don't tell lockdep that IRQs will be enabled in that environment. Instead, when creating kernel threads (which is a rare event compared to entering/leaving userspace) we have to update the lockdep state. Do this by starting threads with IRQs disabled, and in the kthread helper, tell lockdep that IRQs are enabled, and enable them. This provides lockdep with a consistent view of the current IRQ state in kernel space. This also revert portions of 0d928b0b616d1c5c5fe76019a87cba171ca91633 which didn't fix the problem. Tested-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: 6184/2: ux500: use neutral PRCMU baseLinus Walleij2010-07-092-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The MTU wallclock timing fix-up patch was hardwired to the DB8500 causing a regression. This makes it work on the DB5500 as well. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: 6212/1: atomic ops: add memory constraints to inline asmWill Deacon2010-07-091-66/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the 32-bit and 64-bit atomic operations on ARM do not include memory constraints in the inline assembly blocks. In the case of barrier-less operations [for example, atomic_add], this means that the compiler may constant fold values which have actually been modified by a call to an atomic operation. This issue can be observed in the atomic64_test routine in <kernel root>/lib/atomic64_test.c: 00000000 <test_atomic64>: 0: e1a0c00d mov ip, sp 4: e92dd830 push {r4, r5, fp, ip, lr, pc} 8: e24cb004 sub fp, ip, #4 c: e24dd008 sub sp, sp, #8 10: e24b3014 sub r3, fp, #20 14: e30d000d movw r0, #53261 ; 0xd00d 18: e3011337 movw r1, #4919 ; 0x1337 1c: e34c0001 movt r0, #49153 ; 0xc001 20: e34a1aa3 movt r1, #43683 ; 0xaaa3 24: e16300f8 strd r0, [r3, #-8]! 28: e30c0afe movw r0, #51966 ; 0xcafe 2c: e30b1eef movw r1, #48879 ; 0xbeef 30: e34d0eaf movt r0, #57007 ; 0xdeaf 34: e34d1ead movt r1, #57005 ; 0xdead 38: e1b34f9f ldrexd r4, [r3] 3c: e1a34f90 strexd r4, r0, [r3] 40: e3340000 teq r4, #0 44: 1afffffb bne 38 <test_atomic64+0x38> 48: e59f0004 ldr r0, [pc, #4] ; 54 <test_atomic64+0x54> 4c: e3a0101e mov r1, #30 50: ebfffffe bl 0 <__bug> 54: 00000000 .word 0x00000000 The atomic64_set (0x38-0x44) writes to the atomic64_t, but the compiler doesn't see this, assumes the test condition is always false and generates an unconditional branch to __bug. The rest of the test is optimised away. This patch adds suitable memory constraints to the atomic operations on ARM to ensure that the compiler is informed of the correct data hazards. We have to use the "Qo" constraints to avoid hitting the GCC anomaly described at http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44492 , where the compiler makes assumptions about the writeback in the addressing mode used by the inline assembly. These constraints forbid the use of auto{inc,dec} addressing modes, so it doesn't matter if we don't use the operand exactly once. Cc: stable@kernel.org Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unlessWill Deacon2010-07-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The atomic64_add_unless function compares an atomic variable with a given value and, if they are not equal, adds another given value to the atomic variable. The function returns zero if the addition did not occur and non-zero otherwise. On ARM, the return value is initialised to 1 in C code. Inline assembly code then performs the atomic64_add_unless operation, setting the return value to 0 iff the addition does not occur. This means that when the addition *does* occur, the value of ret must be preserved across the inline assembly and therefore requires a "+r" constraint rather than the current one of "=&r". Thanks to Nicolas Pitre for helping to spot this. Cc: stable@kernel.org Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRLSascha Hauer2010-07-091-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On i.MX35 the L2X0_AUX_CTRL register does not have sensible reset default values. Allow them to be overwritten with the aux_val/aux_mask arguments passed to l2x0_init(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge branch 'lmb-to-memblock' of ↵Linus Torvalds2010-07-1472-1025/+1025
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'lmb-to-memblock' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: lmb: rename to memblock
| | * | lmb: rename to memblockYinghai Lu2010-07-1472-1025/+1025
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | via following scripts FILES=$(find * -type f | grep -vE 'oprofile|[^K]config') sed -i \ -e 's/lmb/memblock/g' \ -e 's/LMB/MEMBLOCK/g' \ $FILES for N in $(find . -name lmb.[ch]); do M=$(echo $N | sed 's/lmb/memblock/g') mv $N $M done and remove some wrong change like lmbench and dlmb etc. also move memblock.c from lib/ to mm/ Suggested-by: Ingo Molnar <mingo@elte.hu> Acked-by: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | Merge branch 'merge' of ↵Linus Torvalds2010-07-145-38/+45
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/fsl-booke: Fix address issue when using relocatable kernels powerpc/cpm1: Mark micropatch code/data static and __init powerpc/cpm1: Fix build with various CONFIG_*_UCODE_PATCH combinations powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)
| | * | | powerpc/fsl-booke: Fix address issue when using relocatable kernelsMatthew McClintock2010-07-111-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting a relocatable kernel it needs to jump to the correct start address, which for BookE parts is usually unchanged regardless of the physical memory offset. Recent changes cause problems with how we calculate the start address, it was always adding the RMO into the start address which is incorrect. This patch only adds in the RMO offset if we are in the kexec code path, as it needs the RMO to work correctly. Instead of adding the RMO offset in in the common code path, we can just set r6 to the RMO offset in the kexec code path instead of to zero, and finally perform the masking in the common code path Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | powerpc/cpm1: Mark micropatch code/data static and __initAnton Vorontsov2010-07-112-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This saves runtime memory and fixes lots of sparse warnings like this: CHECK arch/powerpc/sysdev/micropatch.c arch/powerpc/sysdev/micropatch.c:27:6: warning: symbol 'patch_2000' was not declared. Should it be static? arch/powerpc/sysdev/micropatch.c:146:6: warning: symbol 'patch_2f00' was not declared. Should it be static? ... Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | powerpc/cpm1: Fix build with various CONFIG_*_UCODE_PATCH combinationsAnton Vorontsov2010-07-111-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Warnings are treated as errors for arch/powerpc code, so build fails with CONFIG_I2C_SPI_UCODE_PATCH=y: CC arch/powerpc/sysdev/micropatch.o cc1: warnings being treated as errors arch/powerpc/sysdev/micropatch.c: In function 'cpm_load_patch': arch/powerpc/sysdev/micropatch.c:630: warning: unused variable 'smp' make[1]: *** [arch/powerpc/sysdev/micropatch.o] Error 1 And with CONFIG_USB_SOF_UCODE_PATCH=y: CC arch/powerpc/sysdev/micropatch.o cc1: warnings being treated as errors arch/powerpc/sysdev/micropatch.c: In function 'cpm_load_patch': arch/powerpc/sysdev/micropatch.c:629: warning: unused variable 'spp' arch/powerpc/sysdev/micropatch.c:628: warning: unused variable 'iip' make[1]: *** [arch/powerpc/sysdev/micropatch.o] Error 1 This patch fixes these issues by introducing proper #ifdefs. Cc: <stable@kernel.org> [ .33, .34 ] Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)Anton Vorontsov2010-07-113-25/+28
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_t was removed in commit 644b2a680ccc51a9ec4d6beb12e9d47d2dee98e2 ("powerpc/cpm: Remove SPI defines and spi structs"), the commit assumed that spi_t isn't used anywhere outside of the spi_mpc8xxx driver. But it appears that the struct is needed for micropatch code. So, let's reintroduce the struct. Fixes the following build issue: CC arch/powerpc/sysdev/micropatch.o micropatch.c: In function 'cpm_load_patch': micropatch.c:629: error: expected '=', ',', ';', 'asm' or '__attribute__' before '*' token micropatch.c:629: error: 'spp' undeclared (first use in this function) micropatch.c:629: error: (Each undeclared identifier is reported only once micropatch.c:629: error: for each function it appears in.) Reported-by: LEROY Christophe <christophe.leroy@c-s.fr> Reported-by: Tony Breeds <tony@bakeyournoodle.com> Cc: <stable@kernel.org> [ .33, .34 ] Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2010-07-137-5/+29
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: input: i8042 - add runtime check in x86's i8042_platform_init Revert "Input: fixup X86_MRST selects" Revert "Input: do not force selecting i8042 on Moorestown" x86, mrst: Add i8042_detect API for Moorestwon platform x86: Add i8042 pre-detection hook to x86_platform_ops x86, platform: Export x86_platform to modules
| | * | | input: i8042 - add runtime check in x86's i8042_platform_initFeng Tang2010-07-071-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Then it will first check x86_platforms's i8042 detection result, then go on with normal probe. Signed-off-by: Feng Tang <feng.tang@intel.com> LKML-Reference: <4c34dd482753bb8f1@agluck-desktop.sc.intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Acked-by: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| | * | | Revert "Input: fixup X86_MRST selects"Feng Tang2010-07-072-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 0b28bac5aef7bd1ab213723df031e61db9ff151a. After adding x86_platform's detection for i8042 controller, we don't need the force dependency on !X86_MRST any more Cc: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Feng Tang <feng.tang@intel.com> LKML-Reference: <1278342202-10973-5-git-send-email-feng.tang@intel.com> Acked-by: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| | * | | Revert "Input: do not force selecting i8042 on Moorestown"Feng Tang2010-07-072-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 685afae02557a178185a4be36f58332976e79f63. After adding x86_platform's detection for i8042 controller, we don't need the force dependency on !X86_MRST any more Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Feng Tang <feng.tang@intel.com> LKML-Reference: <1278342202-10973-4-git-send-email-feng.tang@intel.com> Acked-by: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| | * | | x86, mrst: Add i8042_detect API for Moorestwon platformFeng Tang2010-07-071-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It will just return 0 as there is no i8042 controller Signed-off-by: Feng Tang <feng.tang@intel.com> LKML-Reference: <1278342202-10973-3-git-send-email-feng.tang@intel.com> Acked-by: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| | * | | x86: Add i8042 pre-detection hook to x86_platform_opsFeng Tang2010-07-072-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some x86 platforms like Intel MID platforms don't have i8042 controllers, and i8042 driver's probe to some legacy IO ports may hang the MID processor. With this hook, i8042 driver can runtime check and skip the probe when the pretection fail which also saves some probe time [ hpa note: this is currently a compile-time check, which breaks the i386 allyesconfig build. This patch series thus does fix a regression. ] Signed-off-by: Feng Tang <feng.tang@intel.com> LKML-Reference: <1278342202-10973-2-git-send-email-feng.tang@intel.com> Acked-by: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| | * | | x86, platform: Export x86_platform to modulesH. Peter Anvin2010-07-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Export x86_platform to modules in preparation of using it for i8042 discovery control. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> LKML-Reference: <1278342202-10973-1-git-send-email-feng.tang@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Feng Tang <feng.tang@intel.com> Cc: Dmitry Torokhov <dtor@mail.ru>
| * | | | Merge branch 'kvm-updates/2.6.35' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2010-07-132-5/+4
| |\ \ \ \ | | |_|_|/ | |/| | | | | | | | | | | | | | | | | | * 'kvm-updates/2.6.35' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: MMU: flush remote tlbs when overwriting spte with different pfn KVM: VMX: Fix host MSR_KERNEL_GS_BASE corruption
| | * | | KVM: MMU: flush remote tlbs when overwriting spte with different pfnXiao Guangrong2010-07-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After remove a rmap, we should flush all vcpu's tlb Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| | * | | KVM: VMX: Fix host MSR_KERNEL_GS_BASE corruptionAvi Kivity2010-07-061-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enter_lmode() and exit_lmode() modify the guest's EFER.LMA before calling vmx_set_efer(). However, the latter function depends on the value of EFER.LMA to determine whether MSR_KERNEL_GS_BASE needs reloading, via vmx_load_host_state(). With EFER.LMA changing under its feet, it took the wrong choice and corrupted userspace's %gs. This causes 32-on-64 host userspace to fault. Fix not touching EFER.LMA; instead ask vmx_set_efer() to change it. Signed-off-by: Avi Kivity <avi@redhat.com>
| * | | | Linux 2.6.35-rc5v2.6.35-rc5Linus Torvalds2010-07-121-1/+1
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| * | | | Merge branch 'arm/defconfig/reduced-v2.6.35-rc1' of ↵Linus Torvalds2010-07-12177-194157/+652
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.pengutronix.de/git/ukl/linux-2.6 * 'arm/defconfig/reduced-v2.6.35-rc1' of git://git.pengutronix.de/git/ukl/linux-2.6: ARM: reduce defconfigs This is a big change, but results in no loss of information, despite us losing almost 200k lines: 177 files changed, 652 insertions(+), 194157 deletions(-) and Grant Likely thinks powerpc can also use the same reduction technique. The python script that did the reduction looks like this: #! /usr/bin/env python # vim: set fileencoding=utf-8 : # Copyright (C) 2010 by Uwe Kleine-König <u.kleine-koenig@pengutronix.de> import re import subprocess import os import sys # This prevents including a timestamp in the .config which makes comparing a # bit easier. os.environ['KCONFIG_NOTIMESTAMP'] = 'Yes, please' # XXX: get these using getopt kernel_tree = '' # os.path.join(os.environ['HOME'], 'gsrc', 'linux-2.6') arch = 'arm' target = sys.argv[1] defconfig_src = os.path.join(kernel_tree, 'arch/%s/configs/%s' % (arch, target)) subprocess.check_call(['make', '-s', 'ARCH=%s' % arch, target]) origconfig = list(open('.config')) config = list(origconfig) config_size = os.stat('.config').st_size i = 0 while i < len(config): print 'test for %r' % config[i] defconfig = open(defconfig_src, 'w') defconfig.writelines(config[:i]) defconfig.writelines(config[i + 1:]) defconfig.close() subprocess.check_call(['make', '-s', 'ARCH=%s' % arch, target]) if os.stat('.config').st_size == config_size and list(open('.config')) == origconfig: del config[i] else: i += 1 defconfig = open(defconfig_src, 'w') defconfig.writelines(config) defconfig.close() which is pretty self-explanatory. Acked-by: Nicolas Pitre <nico@fluxnic.net> Acked-by: Russell King <linux@arm.linux.org.uk> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
generated by cgit (git 2.34.1) at 2025-02-28 14:40:48 +0000