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* cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'Viresh Kumar2014-10-0319-46/+46
| | | | | | | | | | | | | | | The naming convention of this driver was always under the scanner, people complained that it should have a more generic name than cpu0, as it manages all CPUs that are sharing clock lines. Also, in future it will be modified to support any number of clusters with separate clock/voltage lines. Lets rename it to 'cpufreq_dt' from 'cpufreq_cpu0'. Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: ppc-corenet: remove duplicate update of cpu_dataViresh Kumar2014-09-301-1/+0
| | | | | | | | | | 'cpu_data' is updated for policy->cpu first and then for all CPUs in policy->cpus. policy->cpus is guaranteed to contain policy->cpu as well and so the first write to 'cpu_data' for policy->cpu is redundant. Remove it. Acked-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: Replace strnicmp with strncasecmpRasmus Villemoes2014-09-291-3/+3
| | | | | | | | | | | | | | | | The kernel used to contain two functions for length-delimited, case-insensitive string comparison, strnicmp with correct semantics and a slightly buggy strncasecmp. The latter is the POSIX name, so strnicmp was renamed to strncasecmp, and strnicmp made into a wrapper for the new strncasecmp to avoid breaking existing users. To allow the compat wrapper strnicmp to be removed at some point in the future, and to avoid the extra indirection cost, do s/strnicmp/strncasecmp/g. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: powernv: Set the cpus to nominal frequency during reboot/kexecShilpasri G Bhat2014-09-291-0/+35
| | | | | | | | | | | | | | | | | | | This patch ensures the cpus to kexec/reboot at nominal frequency. Nominal frequency is the highest cpu frequency on PowerPC at which the cores can run without getting throttled. If the host kernel had set the cpus to a low pstate and then it kexecs/reboots to a cpufreq disabled kernel it would cause the target kernel to perform poorly. It will also increase the boot up time of the target kernel. So set the cpus to high pstate, in this case to nominal frequency before rebooting to avoid such scenarios. The reboot notifier will set the cpus to nominal frequncy. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: powernv: Set the pstate of the last hotplugged out cpu in ↵Preeti U Murthy2014-09-291-0/+9
| | | | | | | | | | | | | | | | | | | | | | policy->cpus to minimum Its possible today that the pstate of a core is held at a high even after the entire core is hotplugged out if a load had just run on the hotplugged cpu. This is fair, since it is assumed that the pstate does not matter to a cpu in a deep idle state, which is the expected state of a hotplugged core on powerpc. However on powerpc, the pstate at a socket level is held at the maximum of the pstates of each core. Even if the pstates of the active cores on that socket is low, the socket pstate is held high due to the pstate of the hotplugged core in the above mentioned scenario. This can cost significant amount of power loss for no good. Besides, since it is a non active core, nothing can be done from the kernel's end to set the frequency of the core right. Hence make use of the stop_cpu callback to explicitly set the pstate of the core to a minimum when the last cpu of the core gets hotplugged out. Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: Allow stop CPU callback to be used by all cpufreq driversPreeti U Murthy2014-09-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 367dc4aa932bfb3 ("cpufreq: Add stop CPU callback to cpufreq_driver interface") introduced the stop CPU callback for intel_pstate drivers. During the CPU_DOWN_PREPARE stage, this callback is invoked so that drivers can take some action on the pstate of the cpu before it is taken offline. This callback was assumed to be useful only for those drivers which have implemented the set_policy CPU callback because they have no other way to take action about the cpufreq of a CPU which is being hotplugged out except in the exit callback which is called very late in the offline process. The drivers which implement the target/target_index callbacks were expected to take care of requirements like the ones that commit 367dc4aa addresses in the GOV_STOP notification event. But there are disadvantages to restricting the usage of stop CPU callback to cpufreq drivers that implement the set_policy callbacks and who want to take explicit action on the setting the cpufreq during a hotplug operation. 1.GOV_STOP gets called for every CPU offline and drivers would usually want to take action when the last cpu in the policy->cpus mask is taken offline. As long as there is more than one cpu in the policy->cpus mask, cpufreq core itself makes sure that the freq for the other cpus in this mask is set according to the maximum load. This is sensible and drivers which implement the target_index callback would mostly not want to modify that. However the cpufreq core leaves a loose end when the cpu in the policy->cpus mask is the last one to go offline; it does nothing explicit to the frequency of the core. Drivers may need a way to take some action here and stop CPU callback mechanism is the best way to do it today. 2. We cannot implement driver specific actions in the GOV_STOP mechanism. So we will need another driver callback which is invoked from here which is unnecessary. Therefore this patch extends the usage of stop CPU callback to be used by all cpufreq drivers as long as they have this callback implemented and irrespective of whether they are set_policy/target_index drivers. The assumption is if the drivers find the GOV_STOP path to be a suitable way of implementing what they want to do with the freq of the cpu going offine,they will not implement the stop CPU callback at all. Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: cpu0: Make allocate_resources() work for any CPUViresh Kumar2014-09-091-13/+17
| | | | | | | | | | | Currently allocate_resources() supports only CPU0 and it would need to allocate resources for any CPU going forward. Add another argument to it, i.e. cpu, and update code accordingly. Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: cpu0: try regulators with name "cpu-supply"Viresh Kumar2014-09-091-1/+13
| | | | | | | | | | | | | | Currently, we expect regulator name to be "cpu0", but as we are going to support multiple cpu-blocks (all CPUs in a block share clock/voltage) later, we need to pass some generic string instead of that. For backwards compatibility try for "cpu0" first and if it fails, then try for "cpu". Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: cpu0: Move per-cluster initialization code to ->init()Viresh Kumar2014-09-091-53/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently this driver only support platforms on which all CPUs share clock & voltage lines and there is requirement to support platforms which have separate clock & voltage lines for CPUs, like Qualcomm's Krait and ARM's big LITTLE. Each group of CPUs sharing clock/voltage lines are represented by 'struct cpufreq_policy' in cpufreq framework. And core calls ->init() once for each policy. Currently we do all initialization/allocation from probe() which wouldn't work for above scenario. To make it work for these platforms, the first step is to move all initialization/allocation to ->init() and add ->exit() to do the reverse of it. Also, remove all global variables and allocate space for them at runtime. This patch creates 'struct private_data' for keeping all such information and a pointer to that would be stored in policy->driver_data. The changed probe() routine now tries to see if regulator/clocks are available or we need to defer probe. In case they are available, it registers cpufreq driver. Otherwise, returns with -EPROBE_DEFER. We still *don't* support platforms with separate clock/voltage lines for CPUs. This would be done in a separate patch later. Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: cpu0: use dev_{err|warn|dbg} instead of pr_{err|warn|debug}Viresh Kumar2014-09-091-14/+18
| | | | | | | | | | | We already have cpu_dev and is used at multiple places for printing errors using dev_*(). But some prints are still using pr_*(). Lets make it consistent and replace those pr_*() macros with dev_*() macros. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: cpu0: print relevant error when we defer probeViresh Kumar2014-09-091-1/+10
| | | | | | | | | | | | | | | | | | Currently, we defer probe if regulator_get() returned -EPROBE_DEFER, i.e. regulator isn't registered yet. We do a dev_err() in this case. Sending a message to the log on probe defer just duplicates what the driver core is already doing. Convert it to dev_dbg() instead. We should defer in case of clk_get() as well. Current code already does it, but it wasn't intentional probably. Its just that we are returning the right error with wrong print message. Fix print message to convey right error. Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: cpu0: don't validate clock on clk_put()Viresh Kumar2014-09-091-2/+1
| | | | | | | | | | | | CPU clk is not optional for this driver and probe would fail if it couldn't find a suitable clock. And so, while calling clk_put() we don't need to validate clocks. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: cpu0: Update Module AuthorViresh Kumar2014-09-091-0/+4
| | | | | | | | | | Two people are maintaining it now, Viresh and Shawn. Add Viresh's details in MODULE_AUTHOR() and copyright section. Suggested-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: Add support for per-policy driver dataViresh Kumar2014-09-091-0/+3
| | | | | | | | | | | | | Drivers supporting multiple clusters or multiple 'struct cpufreq_policy' instances may need to keep per-policy data. If the core doesn't provide support for that, they might do it in the most unoptimized way: 'per-cpu' data. This patch adds another field in struct cpufreq_policy: 'driver_data'. It isn't accessed by core and is for driver's internal use only. Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq / OPP: Fix the order of arguments for kcalloc()Anand Moon2014-09-081-1/+1
| | | | | | | | | | | | | | | These changes fix the argument to the kcalloc @n: number of elements. @size: element size. @flags: the type of memory to allocate (see kmalloc). void *kcalloc(size_t n, size_t size, gfp_t flags) Fixes: 3c5445ce3a0c (cpufreq: OPP: Avoid sleeping while atomic) Signed-off-by: Anand Moon <moon.linux@yahoo.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* cpufreq: intel_pstate: Remove unneeded variableGabriele Mazzotta2014-09-031-4/+0
| | | | | | | | | It should have been removed with commit d1b6848590af ("cpufreq / intel_pstate: Optimize intel_pstate_set_policy") Signed-off-by: Gabriele Mazzotta <gabriele.mzt@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* Linux 3.17-rc3v3.17-rc3Linus Torvalds2014-08-311-1/+1
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* Merge tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linuxLinus Torvalds2014-08-3124-217/+497
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull Xtensa updates from Chris Zankel: "Xtensa improvements for 3.17: - support highmem on cores with aliasing data cache. Enable highmem on kc705 by default - simplify addition of new core variants (no need to modify Kconfig / Makefiles) - improve robustness of unaligned access handler and its interaction with window overflow/underflow exception handlers - deprecate atomic and spill registers syscalls - clean up Kconfig: remove orphan MATH_EMULATION, sort 'select' statements - wire up renameat2 syscall. Various fixes: - fix address checks in dma_{alloc,free}_coherent (runtime BUG) - fix access to THREAD_RA/THREAD_SP/THREAD_DS (debug build breakage) - fix TLBTEMP_BASE_2 region handling in fast_second_level_miss (runtime unrecoverable exception) - fix a6 and a7 handling in fast_syscall_xtensa (runtime userspace register clobbering) - fix kernel/user jump out of fast_unaligned (potential runtime unrecoverabl exception) - replace termios IOCTL code definitions with constants (userspace build breakage)" * tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linux: (25 commits) xtensa: deprecate fast_xtensa and fast_spill_registers syscalls xtensa: don't allow overflow/underflow on unaligned stack xtensa: fix a6 and a7 handling in fast_syscall_xtensa xtensa: allow single-stepping through unaligned load/store xtensa: move invalid unaligned instruction handler closer to its users xtensa: make fast_unaligned store restartable xtensa: add double exception fixup handler for fast_unaligned xtensa: fix kernel/user jump out of fast_unaligned xtensa: configure kc705 for highmem xtensa: support highmem in aliasing cache flushing code xtensa: support aliasing cache in kmap xtensa: support aliasing cache in k[un]map_atomic xtensa: implement clear_user_highpage and copy_user_highpage xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_miss xtensa: allow fixmap and kmap span more than one page table xtensa: make fixmap region addressing grow with index xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DS xtensa: add renameat2 syscall xtensa: fix address checks in dma_{alloc,free}_coherent xtensa: replace IOCTL code definitions with constants ...
| * Merge tag 'xtensa-for-next-20140815' into for_nextChris Zankel2014-08-1824-217/+497
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xtensa improvements for 3.17: - support highmem on cores with aliasing data cache. Enable highmem on kc705 by default; - simplify addition of new core variants (no need to modify Kconfig / Makefiles); - improve robustness of unaligned access handler and its interaction with window overflow/underflow exception handlers; - deprecate atomic and spill registers syscalls; - clean up Kconfig: remove orphan MATH_EMULATION, sort 'select' statements; - wire up renameat2 syscall. Various fixes: - fix address checks in dma_{alloc,free}_coherent (runtime BUG); - fix access to THREAD_RA/THREAD_SP/THREAD_DS (debug build breakage); - fix TLBTEMP_BASE_2 region handling in fast_second_level_miss (runtime unrecoverable exception); - fix a6 and a7 handling in fast_syscall_xtensa (runtime userspace register clobbering); - fix kernel/user jump out of fast_unaligned (potential runtime unrecoverable exception); - replace termios IOCTL code definitions with constants (userspace build breakage). Signed-off-by: Chris Zankel <chris@zankel.net>
| | * xtensa: deprecate fast_xtensa and fast_spill_registers syscallsMax Filippov2014-08-142-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These syscalls are not used by userspace tools for some time now, and they have issues when called with invalid arguments. It's not worth changing signal delivery mechanism as we don't expect any new users for these syscalls. Let's keep them for backwards compatibility under #ifdef, disabled by default. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: don't allow overflow/underflow on unaligned stackMax Filippov2014-08-143-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Double exceptions that happen during register window overflow/underflow are handled in the topmost stack frame, as if it was the only exception that occured. However unaligned access exception handler is special because it needs to analyze instruction that caused the exception, but the userspace instruction that triggered window exception is completely irrelevant. Unaligned data access is rather normal in the generic userspace code, but stack pointer manipulation must always be done by architecture-aware code and thus unaligned stack means a serious problem anyway. Use the default unaligned access handler that raises SIGBUS in case of unaligned access in window overflow/underflow handler. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: fix a6 and a7 handling in fast_syscall_xtensaMax Filippov2014-08-141-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove restoring a6 on some return paths and instead modify and restore it in a single place, using symbolic name. Correctly restore a7 from PT_AREG7 in case of illegal a6 value. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: allow single-stepping through unaligned load/storeMax Filippov2014-08-141-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Update icount when icountlevel is non-zero but not greater than EXCM level when load/store instruction is successfully emulated. This allows single-stepping over such instruction in userspace debugger. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: move invalid unaligned instruction handler closer to its usersMax Filippov2014-08-141-33/+29
| | | | | | | | | | | | | | | | | | | | | | | | With this change a threaded jump from .Linvalid_instruction_load to .Linvalid_instruction can be removed and more code may be added to common load/store exit path. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: make fast_unaligned store restartableMax Filippov2014-08-141-32/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fast_unaligned may encounter DTLB miss or SEGFAULT during the store emulation. Don't update epc1 and lcount until after the store emulation is complete, so that the faulting store instruction could be replayed. Remove duplicate code handling zero overhead loops and calculate new epc1 and lcount in one place. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: add double exception fixup handler for fast_unalignedMax Filippov2014-08-141-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | fast_unaligned_fixup restores user registers and runs normal exception handler in the current stack frame. Unaligned load/store is retried after that. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: fix kernel/user jump out of fast_unalignedMax Filippov2014-08-141-1/+1
| | | | | | | | | | | | | | | | | | Use correct register (a0, just read from the PS) to check user mode bit. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: configure kc705 for highmemMax Filippov2014-08-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Enable all memory available on KC705 (1G - 128M) by default. Update memory node in DTS and also limit usable memory in bootargs in case memmap is passed from the bootloader. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: support highmem in aliasing cache flushing codeMax Filippov2014-08-141-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use __flush_invalidate_dcache_page_alias with alias set to color of the page physical address instead of __flush_invalidate_dcache_page: this works for high memory pages and mapping/unmapping to the TLBTEMP area is virtually free. Allow building configurations with aliasing cache and highmem enabled. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: support aliasing cache in kmapMax Filippov2014-08-142-2/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define ARCH_PKMAP_COLORING and provide corresponding macro definitions on cores with aliasing data cache. Instead of single last_pkmap_nr maintain an array last_pkmap_nr_arr of pkmap counters for each page color. Make sure that kmap maps physical page at virtual address with color matching its physical address. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: support aliasing cache in k[un]map_atomicMax Filippov2014-08-143-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | Map high memory pages at virtual addresses with color that match color of their physical address. Existing cache alias management mechanisms may be used with such pages. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: implement clear_user_highpage and copy_user_highpageMax Filippov2014-08-144-66/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing clear_user_page and copy_user_page cannot be used with highmem because they calculate physical page address from its virtual address and do it incorrectly in case of high memory page mapped with kmap_atomic. Also kmap is not needed, as most likely userspace mapping color would be different from the kmapped color. Provide clear_user_highpage and copy_user_highpage functions that determine if temporary mapping is needed for the pages. Move most of the logic of the former clear_user_page and copy_user_page to xtensa/mm/cache.c only leaving temporary mapping setup, invalidation and clearing/copying in the xtensa/mm/misc.S. Rename these functions to clear_page_alias and copy_page_alias. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_missMax Filippov2014-08-142-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current definition of TLBTEMP_BASE_2 is always 32K above the TLBTEMP_BASE_1, whereas fast_second_level_miss handler for the TLBTEMP region analyzes virtual address bit (PAGE_SHIFT + DCACHE_ALIAS_ORDER) to determine TLBTEMP region where the fault happened. The size of the TLBTEMP region is also checked incorrectly: not 64K, but twice data cache way size (whicht may as well be less than the instruction cache way size). Fix TLBTEMP_BASE_2 to be TLBTEMP_BASE_1 + data cache way size. Provide TLBTEMP_SIZE that is a greater of doubled data cache way size or the instruction cache way size, and use it to determine if the second level TLB miss occured in the TLBTEMP region. Practical occurence of page faults in the TLBTEMP area is extremely rare, this code can be tested by deletion of all w[di]tlb instructions in the tlbtemp_mapping region. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: allow fixmap and kmap span more than one page tableMax Filippov2014-08-141-16/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | To support aliasing cache both kmap region sizes are multiplied by the number of data cache colors. After that expansion page tables that cover kmap regions may become larger than one page. Correctly allocate and initialize page tables in this case. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: make fixmap region addressing grow with indexMax Filippov2014-08-142-6/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | It's much easier to reason about alignment and coloring of regions located in the fixmap when fixmap index is just a PFN within the fixmap region. Change fixmap addressing so that index 0 corresponds to FIXADDR_START instead of the FIXADDR_TOP. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DSMax Filippov2014-08-142-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With SMP and a lot of debug options enabled task_struct::thread gets out of reach of s32i/l32i instructions with base pointing at task_struct, breaking build with the following messages: arch/xtensa/kernel/entry.S: Assembler messages: arch/xtensa/kernel/entry.S:1002: Error: operand 3 of 'l32i.n' has invalid value '1048' arch/xtensa/kernel/entry.S:1831: Error: operand 3 of 's32i.n' has invalid value '1040' arch/xtensa/kernel/entry.S:1832: Error: operand 3 of 's32i.n' has invalid value '1044' Change base to point to task_struct::thread in such cases. Don't use a10 in _switch_to to save/restore prev pointer as a2 is not clobbered. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: add renameat2 syscallMiklos Szeredi2014-08-141-1/+4
| | | | | | | | | | | | | | | | | | Signed-off-by: Miklos Szeredi <mszeredi@suse.cz> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: fix address checks in dma_{alloc,free}_coherentAlan Douglas2014-08-141-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Virtual address is translated to the XCHAL_KSEG_CACHED region in the dma_free_coherent, but is checked to be in the 0...XCHAL_KSEG_SIZE range. Change check for end of the range from 'addr >= X' to 'addr > X - 1' to handle the case of X == 0. Replace 'if (C) BUG();' construct with 'BUG_ON(C);'. Cc: stable@vger.kernel.org Signed-off-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: replace IOCTL code definitions with constantsMax Filippov2014-08-141-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes userspace code that builds on other architectures but fails on xtensa due to references to structures that other architectures don't refer to. E.g. this fixes the following issue with python-2.7.8: python-2.7.8/Modules/termios.c:861:25: error: invalid application of 'sizeof' to incomplete type 'struct serial_multiport_struct' {"TIOCSERGETMULTI", TIOCSERGETMULTI}, python-2.7.8/Modules/termios.c:870:25: error: invalid application of 'sizeof' to incomplete type 'struct serial_multiport_struct' {"TIOCSERSETMULTI", TIOCSERSETMULTI}, python-2.7.8/Modules/termios.c:900:24: error: invalid application of 'sizeof' to incomplete type 'struct tty_struct' {"TIOCTTYGSTRUCT", TIOCTTYGSTRUCT}, Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: remove orphan MATH_EMULATION symbolMax Filippov2014-08-144-8/+0
| | | | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: select HAVE_IDE only on platforms that may have itMax Filippov2014-08-142-2/+3
| | | | | | | | | | | | | | | | | | | | | HAVE_IDE is not a property of architecture but of a platform, and neither ISS or XTFPGA support it. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: sort 'select' statements in KconfigMax Filippov2014-08-141-11/+11
| | | | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: make MMU-related configuration options depend on MMUMax Filippov2014-08-141-0/+2
| | | | | | | | | | | | | | | | | | | | | MMUv3 and HIGHMEM support are available only on configurations with MMU, don't show them otherwise. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| | * xtensa: simplify addition of new core variantsMax Filippov2014-08-142-6/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of adding new Kconfig options and Makefile rules for each new core variant provide XTENSA_VARIANT_CUSTOM variant and record variant name in the XTENSA_VARIANT_NAME variable. Adding new core variant now means providing directory structure under arch/xtensa/variant and specifying correct name in kernel configuration. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* | | unicore32: Fix build errorGuenter Roeck2014-08-311-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | unicore32 builds fail with arch/unicore32/kernel/signal.c: In function ‘setup_frame’: arch/unicore32/kernel/signal.c:257: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c:279: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c: In function ‘handle_signal’: arch/unicore32/kernel/signal.c:306: warning: unused variable ‘tsk’ arch/unicore32/kernel/signal.c: In function ‘do_signal’: arch/unicore32/kernel/signal.c:376: error: implicit declaration of function ‘get_signsl’ make[1]: *** [arch/unicore32/kernel/signal.o] Error 1 make: *** [arch/unicore32/kernel/signal.o] Error 2 Bisect points to commit 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()"). This code never even compiled. Reverting the patch does not work, since previously used functions no longer exist, so try to fix it up. Compile tested only. Fixes: 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()") Cc: Richard Weinberger <richard@nod.at> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2014-08-3110-39/+37
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Various assorted fixes: - a couple of patches from Mark Rutland to resolve an errata with Cortex-A15 CPUs. - fix cpuidle for the CPU part ID changes in the last merge window - add support for a relocation which ARM binutils is generating in some circumstances" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part number ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex ARM: 8128/1: abort: don't clear the exclusive monitors ARM: 8127/1: module: add support for R_ARM_TARGET1 relocations
| * | | ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part numberJuri Lelli2014-08-273-11/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit af040ffc9ba1 ("ARM: make it easier to check the CPU part number correctly") changed ARM_CPU_PART_X masks, and the way they are returned and checked against. Usage of read_cpuid_part_number() is now deprecated, and calling places updated accordingly. This actually broke cpuidle-big_little initialization, as bl_idle_driver_init() performs a check using an hardcoded mask on cpu_id. Create an interface to perform the check (that is now even easier to read). Define also a proper mask (ARM_CPU_PART_MASK) that makes this kind of checks cleaner and helps preventing bugs in the future. Update usage accordingly. Signed-off-by: Juri Lelli <juri.lelli@arm.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strexMark Rutland2014-08-273-16/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On revisions of Cortex-A15 prior to r3p3, a CLREX instruction at PL1 may falsely trigger a watchpoint exception, leading to potential data aborts during exception return and/or livelock. This patch resolves the issue in the following ways: - Replacing our uses of CLREX with a dummy STREX sequence instead (as we did for v6 CPUs). - Removing the clrex code from v7_exit_coherency_flush and derivatives, since this only exists as a minor performance improvement when non-cached exclusives are in use (Linux doesn't use these). Benchmarking on a variety of ARM cores revealed no measurable performance difference with this change applied, so the change is performed unconditionally and no new Kconfig entry is added. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 8128/1: abort: don't clear the exclusive monitorsMark Rutland2014-08-272-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARMv6 and ARMv7 early abort handlers clear the exclusive monitors upon entry to the kernel, but this is redundant: - We clear the monitors on every exception return since commit 200b812d0084 ("Clear the exclusive monitor when returning from an exception"), so this is not necessary to ensure the monitors are cleared before returning from a fault handler. - Any dummy STREX will target a temporary scratch area in memory, and may succeed or fail without corrupting useful data. Its status value will not be used. - Any other STREX in the kernel must be preceded by an LDREX, which will initialise the monitors consistently and will not depend on the earlier state of the monitors. Therefore we have no reason to care about the initial state of the exclusive monitors when a data abort is taken, and clearing the monitors prior to exception return (as we already do) is sufficient. This patch removes the redundant clearing of the exclusive monitors from the early abort handlers. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 8127/1: module: add support for R_ARM_TARGET1 relocationsAndrey Ryabinin2014-08-272-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel module build with GCOV profiling fails to load with the following error: $ insmod test_module.ko test_module: unknown relocation: 38 insmod: can't insert 'test_module.ko': invalid module format This happens because constructor pointers in the .init_array section have not supported R_ARM_TARGET1 relocation type. Documentation (ELF for the ARM Architecture) says: "The relocation must be processed either in the same way as R_ARM_REL32 or as R_ARM_ABS32: a virtual platform must specify which method is used." Since kernel expects to see absolute addresses in .init_array R_ARM_TARGET1 relocation type should be treated the same way as R_ARM_ABS32. Signed-off-by: Andrey Ryabinin <a.ryabinin@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>