| Commit message (Collapse) | Author | Age | Files | Lines |
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This adds basic support for gate-clocks on Rockchip SoCs.
There are 16 gates in each register and use the HIWORD_MASK
mechanism for changing gate settings.
The gate registers form a continuos block which makes the dt node
structure a matter of taste, as either all 160 gates can be put into
one gate clock spanning all registers or they can be divided into
the 10 individual gates containing 16 clocks each.
The code supports both approaches.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch adds a basic clock driver for the TI-Nspire calculator
series.
Changes from v1:
* Removed filename in header comment
* Removed unnecessary #undef EXTRACT statement
Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed $SUBJECT and changelog max width]
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The WM8850 has a different PLL clock to the previous versions. This
patch adds support for the WM8850-style PLL clocks.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The A13 has a lot less clocks than the one found in the Allwinner A10.
Add these stripped down clocks to the clock driver and in the
documentation.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch adds platform data and DT bindings to allow to overwrite
the stored disabled state for each clock output.
Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A fairly quiet release for the SPI subsystem, the standout changes
being:
- Core support for implementing bits per word constraints implemented
by Stephen Warren, factoring some code out of drivers.
- Addition of polling mode support for the s3c64xx driver as some
newer Exynos systems have taken the unusual step of removing
interrupt support.
- Use of the in-IP FIFO and generic dmaengine support for the OMAP2
driver, providing improved performance.
- Conversion of the mpc512x driver to use the core message queue
infrastructure.
The nicest thing being that all the factoring out into common code
leads to a negative diffstat overall."
* tag 'spi-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (42 commits)
spi/s3c64xx: Rely on the compiler eliminating the OF ID table
spi: s3c64xx: Added support for exynos5440 spi
spi: s3c64xx: Added provision for dedicated cs pin
spi: omap2-mcspi: add generic DMA request support to the DT binding
spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
spi/s3c64xx: Make wait_for_timeout() function name less generic
spi: s3c64xx: added support for polling mode
spi: omap2-mcspi: Add FIFO buffer support
spi: omap2-mcspi: Move bytes per word calculation to the function
spi: spi-xilinx: cleanup a check in xilinx_spi_txrx_bufs()
spi: spi-nuc900: Remove redundant platform_set_drvdata()
spi: spi-fsl-lib: Make mpc8xxx_spi_work static
spi: spi-topcliff-pch: Fix sparse warnings
spi: spi-xilinx: Remove redundant platform_set_drvdata()
spi: spi-xilinx: Add run run-time endian detection
spi: mpc512x: use the SPI subsystem's message queue
spi: mpc512x: improve throughput in the RX/TX func
spi: mpc512x: minor prep before feature change
spi: atmel: convert to dma_request_slave_channel_compat()
spi: sirf: avoid uninitialized-use warning
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The binding definition is based on the generic DMA request binding
Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control changes from Linus Walleij:
- A large slew of improvements of the Genric pin configuration support,
and deployment in four different platforms: Rockchip, Super-H PFC,
ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing
and debugfs support into shape.
- We also have device tree support with generic naming conventions for
the generic pin configuration.
- Delete the unused and confusing direct pinconf API. Now state
transitions is *the* way to control pins and multiplexing.
- New drivers for Rockchip, TZ1090, and TZ1090 PDC.
- Two pin control states related to power management are now handled in
the device core: "sleep" and "idle", removing a lot of boilerplate
code in drivers. We do not yet know if this is the final word for
pin PM, but it already make things a lot easier to handle.
- Handle sparse GPIO ranges passing a list of disparate pins, and
utilize these in the new BayTrail (x86 Atom SoC) driver.
- Make the sunxi (AllWinner) driver handle external interrupts.
- Make it possible for pinctrl-single to handle the case where several
pins are managed by a single register, and augment it to handle sleep
modes.
- Cleanups and improvements for the abx500 drivers.
- Move Sirf pin control drivers to their own directory, support
save/restore of context and add support for the SiRFatlas6 SoC.
- PMU muxing for the Dove pinctrl driver.
- Finalization and support for VF610 in the i.MX6 pinctrl driver.
- Smoothen out various Exynos rough edges.
- Generic cleanups of various kinds.
* tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
pinctrl: remove bindings for pinconf options needing more thought
pinctrl: remove slew-rate parameter from tz1090
pinctrl: set unit for debounce time pinconfig to usec
pinctrl: more clarifications for generic pull configs
pinctrl: rip out the direct pinconf API
pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
pinctrl-tz1090: add TZ1090 pinctrl driver
pinctrl: samsung: Staticize drvdata_list
pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
pinctrl: abx500: rework error path
pinctrl: abx500: suppress hardcoded value
pinctrl: abx500: factorize code
pinctrl: abx500: fix abx500_gpio_get()
pinctrl: abx500: fix abx500_pin_config_set()
pinctrl: abx500: Add device tree support
sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
pinctrl: add Intel BayTrail GPIO/pinctrl support
pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc
pinctrl: Staticize local symbols
...
Conflicts:
drivers/net/ethernet/ti/davinci_mdio.c
drivers/pinctrl/Makefile
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Some options currently take arguments in unspecified driver-specific units.
As pointed out by Stephen Warren, driver specific values should not be part
of generic devicetree bindings describing the hardware.
Therefore remove the critical bindings again, before they become part of
an official release.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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As the binding for slew-rate is under discussion and seems to need
more tought it will get removed for now, so it doesn't get an offical
release.
Therefore remove it again from the only current user, tz1090.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Currently the debounce time pinconfig option uses an unspecified
"time units" unit. As pinconfig options should use SI units and a
real unit is also necessary for generic dt bindings, change it
to usec. Currently no driver is using the generic pinconfig option
for this, so the unit change is safe to do.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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PULL_PIN_DEFAULT is meant for hardware completely hiding any pull
settings from the driver, so that it's really only possible to turn
the pull on or off, but it not being possible to determine any
pull settings from software.
Also the binding-documentation for the pull arguments did not match
the changes to the expected values.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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From the inception ot the pin config API there has been the
possibility to get a handle at a pin directly and configure
its electrical characteristics. For this reason we had:
int pin_config_get(const char *dev_name, const char *name,
unsigned long *config);
int pin_config_set(const char *dev_name, const char *name,
unsigned long config);
int pin_config_group_get(const char *dev_name,
const char *pin_group,
unsigned long *config);
int pin_config_group_set(const char *dev_name,
const char *pin_group,
unsigned long config);
After the introduction of the pin control states that will
control pins associated with devices, and its subsequent
introduction to the device core, as well as the
introduction of pin control hogs that can set up states on
boot and optionally also at sleep, this direct pin control
API is a thing of the past.
As could be expected, it has zero in-kernel users.
Let's delete this API and make our world simpler.
Reported-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add a pin control driver for the TZ1090's low power pins via the
powerdown controller SOC_GPIO_CONTROL registers.
These pins have individually controlled pull-up, and group controlled
schmitt, slew-rate, drive-strength, and power-on-start (pos).
The pdc_gpio0 and pdc_gpio1 pins can also be muxed onto the
ir_mod_stable_out and ir_mod_power_out functions respectively. If no
function is set they remain in GPIO mode. These muxes can be overridden
by requesting them as GPIOs.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-doc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller (PDC) registers.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-doc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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We use the same way to define pin muxing and pin configuration
than for nomadik. So pickup code from pinctrl_nomadik.c to be
able to implement pin multiplexing and pin configuration using
the device tree. Pin configuration uses generic parsing code.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Support device instantiation through the device tree. The compatible
property is used to select the SoC pinmux information.
Set the gpio_chip device field to the PFC device to enable automatic
GPIO OF support.
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The bias-pull-* options use values > 0 to indicate that the pull should
be activated and optionally also indicate the strength of the pull.
Therefore use an default value of 1 for these options.
Split the low-power-mode option into low-power-enable and -disable.
Update the documentation to describe the param arguments better.
Reported-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This updates the GPIO range documentation with the API changes
for sparse/random/arbitrary pin-to-GPIO mappings.
Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.
Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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pinconf_generic_parse_dt_config() takes a node as input and generates an
array of generic pinconfig values from the properties of this node.
As I couldn't find a mechanism to count the number of properties of a node
the function uses internally an array to accept one of parameter and copies
the real present options to a smaller variable at its end.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add support to configure multiple pins in each register, existing
implementation added by [1] does not support full fledge multiple pin
configuration in single register, reports a pin clash when different
modules configure different bits of same register. The issue reported
and discussed here
http://www.spinics.net/lists/arm-kernel/msg235213.html
With pinctrl-single,bits-per-mux property specified, use function-mask
property to find out number pins to configure. Allocate and register
pin control functions based sub mask.
Tested on da850/omap-l138 EVM.
does not support variable submask for pins.
does not support pinconf.
[1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux"
(9e605cb68a21d5704839a192a46ebcf387773704),
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Reported-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Tested-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Adds Freescale Vybrid VF610 pin controller
driver to IMX common pinctrl driver framework.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Fix typo in "communicate directly with with the pinctrl subsystem".
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Dove power management unit can mux some special functions to mpp0-15.
This patch adds support to set/get the current PMU function mapped
to the corresponding mpp pins. The device tree documentation is also
updated accordingly.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
Pull regmap updates from Mark Brown:
"A small but useful set of regmap updates this time around:
- An abstraction for bitfields within a register map contributed by
Srinivas Kandagatla, allowing drivers to cope more easily when
hardware designers randomly move things about (mainly when talking
to things like system controllers).
- Changes from Lars-Peter Clausen to allow the MMIO regmap to be used
from hard IRQ context.
- Small improvements to the cache infrastructure and performance,
including a default cache sync operation so now all regmaps can
sync easily.
There's also a pinctrl driver making use of the new bitfield API,
merged here for dependency reasons. There will be a simple add/add
conflict with the pinctrl tree as a result."
* tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
pinctrl: st: Remove unnecessary use of of_match_ptr macro
pinctrl: st: fix return value check
pinctrl: st: Add pinctrl and pinconf support.
regmap: debugfs: Suppress cache for partial register files
regmap: Add regmap_field APIs
regmap: core: Cache all registers by default when cache is enabled
regmap: Implemented default cache sync operation
regmap: Make regmap-mmio usable from atomic contexts
regmap: regcache: Fixup locking for custom lock callbacks
regmap: debugfs: Fix return from regmap_debugfs_get_dump_start
regmap: debugfs: Don't mark lockdep as broken due to debugfs write
regmap: rbtree: Use range information to allocate nodes
regmap: rbtree: Factor out node allocation
regmap: Make regmap_check_range_table() a public API
regmap: Add support for discarding parts of the register cache
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This patch add pinctrl support to ST SoCs.
About hardware:
ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
pin configurations.
Each multi-function pin is controlled, driven and routed through the PIO
multiplexing block. Each pin supports GPIO functionality (ALT0) and
multiple alternate functions(ALT1 - ALTx) that directly connect the pin
to different hardware blocks. When a pin is in GPIO mode, Output Enable
(OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO
block. Otherwise the PIO multiplexing block configures these parameters
and retiming the signal.
About driver:
This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
pinconf, pinmux, gpio subsystems. All the pinctrl related config
information can only come from device trees.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"Here is a batch of GPIO changes for v3.11. I have agreed with Grant
to take care of the pull requests for this development cycle.
No special things are happening in the GPIO tree this time (nice with
some calm) and I have been extra careful to do regression builds and
it's well boiled in -next.
GPIO changes for the v3.11 development cycle:
- Incremental development for the Langwell (Atom SoC), Xilinx, ICH
and RCAR drivers.
- Cleanups from Jingoo Han, Axel Lin, Wei Jongjun, Wolfram Sang,
Tushar Behera, Sachin Kamat and Yijing Wang"
* tag 'gpio-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (35 commits)
Gpio/trivial: replace numeric with standard PM state macros
gpiolib: remove warnning of allocations with IRQs disabled
gpio: grgpio: Staticize local symbols
gpio-langwell: remove Withney point support
gpio: ich: add GPO_BLINK support
gpio-sta2x11: Convert to use devm_ioremap_resource
gpio_msm: Convert to use devm_ioremap_resource
gpio-rcar: Use OUTDT when reading GPIOs configured as output
gpio-sta2x11: Fix potential NULL pointer dereference
gpio/omap: omap_gpio_init_context stub must be inline
gpio: msm-v1: Remove errant __devinit to fix compile
gpio: devres: make comments proper
GPIO: xilinx: Enable driver for Xilinx zynq
DT: Add documentation for gpio-xilinx
GPIO: xilinx: Use BIT macro
GPIO: xilinx: Use __raw_readl/__raw_writel IO functions
GPIO: xilinx: Add support for dual channel
GPIO: xilinx: Simplify driver probe function
gpio: sx150x: convert to use devm_* functions
MAINTAINERS: add linux-gpio mailing list
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Describe gpio-xilinx binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
Pull thermal power-limit update from Tony Luck:
"Thermal limit warnings are too scary and cause unnecessary concern"
* tag 'please-pull-mce-therm' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux:
x86 thermal: Disable power limit notification interrupt by default
x86 thermal: Delete power-limit-notification console messages
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The package power limit notification interrupt is primarily for
system diagnosis, and should not be blindly enabled on every
system by default -- particuarly since Linux does nothing in the
handler except count how many times it has been called...
Add a new kernel cmdline parameter "int_pln_enable" for situations where
users want to oberve these events via existing system counters:
$ grep TRM /proc/interrupts
$ grep . /sys/devices/system/cpu/cpu*/thermal_throttle/*
https://bugzilla.kernel.org/show_bug.cgi?id=36182
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k
Pull "exotic" arch fixes from Geert Uytterhoeven:
"This is a collection of several exotic architecture fixes, and a few
other fixes for issues that were detected while doing the former"
* 'exotic-arch-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: (35 commits)
lib: Move fonts from drivers/video/console/ to lib/fonts/
console/font: Refactor font support code selection logic
Revert "staging/solo6x10: depend on CONFIG_FONTS"
input: cros_ec_keyb_clear_keyboard() depends on CONFIG_PM_SLEEP
score: Wire up asm-generic/xor.h
score: Remove unneeded <asm/dma-mapping.h>
openrisc: Wire up asm-generic/xor.h
h8300/boot: Use POSIX "$((..))" instead of bashism "$[...]"
h8300: Mark H83002 and H83048 CPU support broken
h8300: Switch h8300 to drivers/Kconfig
h8300: Limit timer channel ranges in Kconfig
h8300: Wire up asm-generic/xor.h
h8300: Fill the system call table using a CALL() macro
h8300: Fix <asm/tlb.h>
h8300: Hardcode symbol prefixes in asm sources
h8300: add missing definition for read_barries_depends()
frv: head.S - Remove commented-out initialization code
cris: Wire up asm-generic/vga.h
parport: disable PC-style parallel port support on cris
console: Disable VGA text console support on cris
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Several drivers need font support independent of CONFIG_VT, cfr. commit
9cbce8d7e1dae0744ca4f68d62aa7de18196b6f4, "console/font: Refactor font
support code selection logic").
Hence move the fonts and their support logic from drivers/video/console/ to
its own library directory lib/fonts/.
This also allows to limit processing of drivers/video/console/Makefile to
CONFIG_VT=y again.
[Kevin Hilman <khilman@linaro.org>: Update arch/arm/boot/compressed/Makefile]
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 updates from Martin Schwidefsky:
"This is the bulk of the s390 patches for the 3.11 merge window.
Notable enhancements are: the block timeout patches for dasd from
Hannes, and more work on the PCI support front. In addition some
cleanup and the usual bug fixing."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: (42 commits)
s390/dasd: Fail all requests when DASD_FLAG_ABORTIO is set
s390/dasd: Add 'timeout' attribute
block: check for timeout function in blk_rq_timed_out()
block/dasd: detailed I/O errors
s390/dasd: Reduce amount of messages for specific errors
s390/dasd: Implement block timeout handling
s390/dasd: process all requests in the device tasklet
s390/dasd: make number of retries configurable
s390/dasd: Clarify comment
s390/hwsampler: Updated misleading member names in hws_data_entry
s390/appldata_net_sum: do not use static data
s390/appldata_mem: do not use static data
s390/vmwatchdog: do not use static data
s390/airq: simplify adapter interrupt code
s390/pci: remove per device debug attribute
s390/dma: remove gratuitous brackets
s390/facility: decompose test_facility()
s390/sclp: remove duplicated include from sclp_ctl.c
s390/irq: store interrupt information in pt_regs
s390/drivers: Cocci spatch "ptr_ret.spatch"
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Add a character misc device "sclp_ctl" that allows to run SCCBs
from user space using the SCLP_CTL_SCCB ioctl.
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64
Pull ARM64 updates from Catalin Marinas:
"Main features:
- KVM and Xen ports to AArch64
- Hugetlbfs and transparent huge pages support for arm64
- Applied Micro X-Gene Kconfig entry and dts file
- Cache flushing improvements
For arm64 huge pages support, there are x86 changes moving part of
arch/x86/mm/hugetlbpage.c into mm/hugetlb.c to be re-used by arm64"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: (66 commits)
arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board
arm64: Add defines for APM ARMv8 implementation
arm64: Enable APM X-Gene SOC family in the defconfig
arm64: Add Kconfig option for APM X-Gene SOC family
arm64/Makefile: provide vdso_install target
ARM64: mm: THP support.
ARM64: mm: Raise MAX_ORDER for 64KB pages and THP.
ARM64: mm: HugeTLB support.
ARM64: mm: Move PTE_PROT_NONE bit.
ARM64: mm: Make PAGE_NONE pages read only and no-execute.
ARM64: mm: Restore memblock limit when map_mem finished.
mm: thp: Correct the HPAGE_PMD_ORDER check.
x86: mm: Remove general hugetlb code from x86.
mm: hugetlb: Copy general hugetlb code from x86 to mm.
x86: mm: Remove x86 version of huge_pmd_share.
mm: hugetlb: Copy huge_pmd_share from x86 to mm.
arm64: KVM: document kernel object mappings in HYP
arm64: KVM: MAINTAINERS update
arm64: KVM: userspace API documentation
arm64: KVM: enable initialization of a 32bit vcpu
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HYP mode has access to some of the kernel pages. Document the
memory mapping and the offset between kernel VA and HYP VA.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Unsurprisingly, the arm64 userspace API is extremely similar to
the 32bit one, the only significant difference being the ONE_REG
register mapping.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Pull ARM updates from Russell King:
"This contains the usual updates from other people (listed below) and
the usual random muddle of miscellaneous ARM updates which cover some
low priority bug fixes and performance improvements.
I've started to put the pull request wording into the merge commits,
which are:
- NoMMU stuff:
This includes the following series sent earlier to the list:
- nommu-fixes
- R7 Support
- MPU support
I've left out the ARCH_MULTIPLATFORM/!MMU stuff that Arnd and I
were discussing today until we've reached a conclusion/that's had
some more review.
This is rebased (and re-tested) on your devel-stable branch because
otherwise there were going to be conflicts with Uwe's V7M work now
that you've merged that. I've included the fix for limiting MPU to
CPU_V7.
- Huge page support
These changes bring both HugeTLB support and Transparent HugePage
(THP) support to ARM. Only long descriptors (LPAE) are supported
in this series.
The code has been tested on an Arndale board (Exynos 5250).
- LPAE updates
Please pull these miscellaneous LPAE fixes I've been collecting for
a while now for 3.11. They've been tested and reviewed by quite a
few people, and most of the patches are pretty trivial. -- Will Deacon.
- arch_timer cleanups
Please pull these arch_timer cleanups I've been holding onto for a
while. They're the same as my last posting, but have been rebased
to v3.10-rc3.
- mpidr linearisation (multiprocessor id register - identifies which
CPU number we are in the system)
This patch series that implements MPIDR linearization through a
simple hashing algorithm and updates current cpu_{suspend}/{resume}
code to use the newly created hash structures to retrieve context
pointers. It represents a stepping stone for the implementation of
power management code on forthcoming multi-cluster ARM systems.
It has been tested on TC2 (dual cluster A15xA7 system), iMX6q,
OMAP4 and Tegra, with processors hitting low-power states requiring
warm-boot resume through the cpu_resume code path"
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (77 commits)
ARM: 7775/1: mm: Remove do_sect_fault from LPAE code
ARM: 7777/1: Avoid extra calls to the C compiler
ARM: 7774/1: Fix dtb dependency to use order-only prerequisites
ARM: 7770/1: remove residual ARMv2 support from decompressor
ARM: 7769/1: Cortex-A15: fix erratum 798181 implementation
ARM: 7768/1: prevent risks of out-of-bound access in ASID allocator
ARM: 7767/1: let the ASID allocator handle suspended animation
ARM: 7766/1: versatile: don't mark pen as __INIT
ARM: 7765/1: perf: Record the user-mode PC in the call chain.
ARM: 7735/2: Preserve the user r/w register TPIDRURW on context switch and fork
ARM: kernel: implement stack pointer save array through MPIDR hashing
ARM: kernel: build MPIDR hash function data structure
ARM: mpu: Ensure that MPU depends on CPU_V7
ARM: mpu: protect the vectors page with an MPU region
ARM: mpu: Allow enabling of the MPU via kconfig
ARM: 7758/1: introduce config HAS_BANDGAP
ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting
ARM: 7751/1: zImage: don't overwrite ourself with a page table
ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock
ARM: 7748/1: oabi: handle faults when loading swi instruction from userspace
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Rev A2 SoCs have an unorthodox memory re-mapping and this needs
to be reflected in the cache operations.
This patch adds new outer cache functions for the l2x0 driver
to support this SoC revision. It also adds a new compatible
value for the cache to enable this functionality.
Updates from V1:
- remove section 1 altogether and note that in comments
- simplify section selection caused by section 1 removal
- BUG_ON just in case section 1 shows up
Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull second set of VFS changes from Al Viro:
"Assorted f_pos race fixes, making do_splice_direct() safe to call with
i_mutex on parent, O_TMPFILE support, Jeff's locks.c series,
->d_hash/->d_compare calling conventions changes from Linus, misc
stuff all over the place."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (63 commits)
Document ->tmpfile()
ext4: ->tmpfile() support
vfs: export lseek_execute() to modules
lseek_execute() doesn't need an inode passed to it
block_dev: switch to fixed_size_llseek()
cpqphp_sysfs: switch to fixed_size_llseek()
tile-srom: switch to fixed_size_llseek()
proc_powerpc: switch to fixed_size_llseek()
ubi/cdev: switch to fixed_size_llseek()
pci/proc: switch to fixed_size_llseek()
isapnp: switch to fixed_size_llseek()
lpfc: switch to fixed_size_llseek()
locks: give the blocked_hash its own spinlock
locks: add a new "lm_owner_key" lock operation
locks: turn the blocked_list into a hashtable
locks: convert fl_link to a hlist_node
locks: avoid taking global lock if possible when waking up blocked waiters
locks: protect most of the file_lock handling with i_lock
locks: encapsulate the fl_link list handling
locks: make "added" in __posix_lock_file a bool
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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There's no reason we have to protect the blocked_hash and file_lock_list
with the same spinlock. With the tests I have, breaking it in two gives
a barely measurable performance benefit, but it seems reasonable to make
this locking as granular as possible.
Signed-off-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Currently, the hashing that the locking code uses to add these values
to the blocked_hash is simply calculated using fl_owner field. That's
valid in most cases except for server-side lockd, which validates the
owner of a lock based on fl_owner and fl_pid.
In the case where you have a small number of NFS clients doing a lot
of locking between different processes, you could end up with all
the blocked requests sitting in a very small number of hash buckets.
Add a new lm_owner_key operation to the lock_manager_operations that
will generate an unsigned long to use as the key in the hashtable.
That function is only implemented for server-side lockd, and simply
XORs the fl_owner and fl_pid.
Signed-off-by: Jeff Layton <jlayton@redhat.com>
Acked-by: J. Bruce Fields <bfields@fieldses.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Having a global lock that protects all of this code is a clear
scalability problem. Instead of doing that, move most of the code to be
protected by the i_lock instead. The exceptions are the global lists
that the ->fl_link sits on, and the ->fl_block list.
->fl_link is what connects these structures to the
global lists, so we must ensure that we hold those locks when iterating
over or updating these lists.
Furthermore, sound deadlock detection requires that we hold the
blocked_list state steady while checking for loops. We also must ensure
that the search and update to the list are atomic.
For the checking and insertion side of the blocked_list, push the
acquisition of the global lock into __posix_lock_file and ensure that
checking and update of the blocked_list is done without dropping the
lock in between.
On the removal side, when waking up blocked lock waiters, take the
global lock before walking the blocked list and dequeue the waiters from
the global list prior to removal from the fl_block list.
With this, deadlock detection should be race free while we minimize
excessive file_lock_lock thrashing.
Finally, in order to avoid a lock inversion problem when handling
/proc/locks output we must ensure that manipulations of the fl_block
list are also protected by the file_lock_lock.
Signed-off-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Instances either don't look at it at all (the majority of cases) or
only want it to find the superblock (which can be had as dentry->d_sb).
A few cases that want more are actually safe with dentry->d_inode -
the only precaution needed is the check that it hadn't been replaced with
NULL by rmdir() or by overwriting rename(), which case should be simply
treated as cache miss.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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