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* Merge tag 'mm-nonmm-stable-2022-10-11' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds2022-10-1279-171/+69
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| * ia64: mca: use strscpy() is more robust and saferxu xin2022-10-111-1/+1
| * ia64: update config filesLukas Bulwahn2022-10-115-10/+0
| * ia64: move from strlcpy with unused retval to strscpyWolfram Sang2022-09-111-1/+1
| * alpha: move from strlcpy with unused retval to strscpyWolfram Sang2022-09-111-2/+2
| * ia64: fix clock_getres(CLOCK_MONOTONIC) to report ITC frequencySergei Trofimovich2022-09-112-1/+27
| * kernel: exit: cleanup release_thread()Kefeng Wang2022-09-1131-118/+0
| * treewide: defconfig: address renamed CONFIG_DEBUG_INFO=yArnd Bergmann2022-09-1138-38/+38
* | Merge tag 'loongarch-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ch...Linus Torvalds2022-10-1256-685/+4696
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| * | LoongArch: Update Loongson-3 default config fileHuacai Chen2022-10-121-8/+55
| * | LoongArch: Add BPF JIT supportTiezhu Yang2022-10-127-0/+1700
| * | LoongArch: Add some instruction opcodes and formatsTiezhu Yang2022-10-121-5/+174
| * | LoongArch: Move {signed,unsigned}_imm_check() to inst.hTiezhu Yang2022-10-122-10/+10
| * | LoongArch: Add kdump supportYouling Tang2022-10-129-8/+227
| * | LoongArch: Add kexec supportYouling Tang2022-10-126-1/+400
| * | LoongArch: Use generic BUG() handlerYouling Tang2022-10-124-12/+84
| * | LoongArch: Add SysRq-x (TLB Dump) supportHuacai Chen2022-10-122-0/+67
| * | LoongArch: Add perf events supportHuacai Chen2022-10-126-1/+987
| * | LoongArch: Add qspinlock supportHuacai Chen2022-10-124-3/+26
| * | LoongArch: Use TLB for ioremap()Huacai Chen2022-10-127-56/+184
| * | LoongArch: Support access filter to /dev/mem interfaceHuacai Chen2022-10-123-0/+34
| * | LoongArch: Refactor cache probe and flush methodsHuacai Chen2022-10-1210-267/+236
| * | LoongArch: mm: Refactor TLB exception handlersRui Wang2022-10-121-290/+247
| * | LoongArch: Support R_LARCH_GOT_PC_{LO12,HI20} in modulesXi Ruoyao2022-10-124-7/+99
| * | LoongArch: Support PC-relative relocations in modulesXi Ruoyao2022-10-122-1/+75
| * | LoongArch: Define ELF relocation types added in ABIv2.0Xi Ruoyao2022-10-122-1/+38
| * | LoongArch: Adjust symbol addressing for AS_HAS_EXPLICIT_RELOCSXi Ruoyao2022-10-124-6/+37
| * | LoongArch: Add Kconfig option AS_HAS_EXPLICIT_RELOCSXi Ruoyao2022-10-121-0/+3
| * | LoongArch: Kconfig: Fix spelling mistake "delibrately" -> "deliberately"Colin Ian King2022-10-121-1/+1
| * | LoongArch: Mark __xchg() and __cmpxchg() as __always_inlineHuacai Chen2022-10-121-4/+4
| * | LoongArch: Flush TLB earlier at initializationHuacai Chen2022-10-121-2/+3
| * | LoongArch: Do not create sysfs control file for io master CPUsTiezhu Yang2022-10-123-6/+7
| * | LoongArch: Fix cpu name after CPU-hotplugJianmin Lv2022-10-121-1/+3
| * | Merge tag 'efi-next-for-v6.1' into loongarch-nextHuacai Chen2022-10-0326-70/+364
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* | \ \ Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2022-10-1130-384/+466
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| * \ \ \ Merge tag 'kvm-riscv-6.1-1' of https://github.com/kvm-riscv/linux into HEADPaolo Bonzini2022-10-0351-242/+383
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| | * | | | riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORKJisheng Zhang2022-10-021-0/+1
| | * | | | RISC-V: KVM: Use generic guest entry infrastructureJisheng Zhang2022-10-022-12/+7
| | * | | | RISC-V: KVM: Record number of signal exits as a vCPU statJisheng Zhang2022-10-022-0/+3
| | * | | | RISC-V: KVM: add __init annotation to riscv_kvm_init()Xiu Jianfeng2022-10-021-1/+1
| | * | | | RISC-V: KVM: Expose Zicbom to the guestAndrew Jones2022-10-022-2/+8
| | * | | | RISC-V: KVM: Provide UAPI for Zicbom block sizeAndrew Jones2022-10-023-0/+11
| | * | | | RISC-V: KVM: Make ISA ext mappings explicitAndrew Jones2022-10-021-11/+14
| | * | | | RISC-V: KVM: Allow Guest use Zihintpause extensionMayuresh Chitale2022-10-022-0/+3
| | * | | | RISC-V: KVM: Allow Guest use Svinval extensionAnup Patel2022-10-022-0/+3
| | * | | | RISC-V: KVM: Use Svinval for local TLB maintenance when availableAnup Patel2022-10-022-12/+68
| | * | | | RISC-V: Probe Svinval extension form ISA stringMayuresh Chitale2022-10-023-0/+6
| | * | | | RISC-V: KVM: Change the SBI specification version to v1.0Anup Patel2022-10-021-2/+2
| | * | | | riscv: KVM: Apply insn-def to hlv encodingsAndrew Jones2022-10-022-31/+25
| | * | | | riscv: KVM: Apply insn-def to hfence encodingsAndrew Jones2022-10-022-112/+27
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