aboutsummaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* ARM: davinci: fix build break because of undeclared dm365_evm_snd_dataSekhar Nori2016-07-143-4/+3
| | | | | | | | | | | | | | | | | | | commit 6bce5efd4424 ("ARM: davinci: remove unused davinci-i2s pdata") removed all instances of davinci-i2s pdata. However, on DM365 EVM, the same platform data is passed to the voicecodec present on that device. This causes build breakage when voicecodec support is enabled: arch/arm/mach-davinci/board-dm365-evm.c:764:17: error: 'dm365_evm_snd_data' undeclared (first use in this function) voicecodec driver does not use the platform data as well, and it is safe to remove it. Fixes: 6bce5efd4424 ("ARM: davinci: remove unused davinci-i2s pdata") Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* arm: meson: explicitly select clk driversMichael Turquette2016-07-071-0/+3
| | | | | | | | | | | The AmLogic clock controller code is used by both arm and arm64 architectures. Explicitly select the core code for all Meson (32-bit arm) builds, and also select the Meson8b driver when that machine is built. Signed-off-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: tango: add Suspend-to-RAM supportMarc Gonzalez2016-07-073-0/+34
| | | | | | | | | | | Ask firmware to put RAM in self-refresh mode and power system down. echo mem > /sys/power/state See Documentation/power/states.txt Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'arm-soc/for-4.8/soc-part2' of http://github.com/Broadcom/stblinux ↵Arnd Bergmann2016-07-071-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | into next/soc Merge "the second part of the Broadcom ARM-based SoC changes" from Florian Fainelli: - Florian updates the DEBUG_UART_BCM5301X entry to cover both NS and NSP SoCs since they both have the same location * tag 'arm-soc/for-4.8/soc-part2' of http://github.com/Broadcom/stblinux: ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCs
| * ARM: debug: Enable DEBUG_BCM_5301X for Northstar Plus SoCsFlorian Fainelli2016-07-061-2/+2
| | | | | | | | | | | | | | | | Northstar Plus SoCs (ARCH_BCM_NSP) have the exact same UART location and properties like the register shift of 0, so make it usable. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | Merge tag 'hisi-armv7-soc-for-4.8-v3' of ↵Arnd Bergmann2016-07-072-30/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://github.com/hisilicon/linux-hisi into next/soc Merge "ARM: mach-hisi: Hisilicon SoC updates for 4.8" from Wei Xu: - Consolidate the hisilicon armv7 SoCs machine entries - Avoid the compiling warning by making unexported symbols static * tag 'hisi-armv7-soc-for-4.8-v3' of git://github.com/hisilicon/linux-hisi: ARM: hisi: consolidate the hisilicon machine entries ARM: hisi: make unexported symbols static
| * | ARM: hisi: consolidate the hisilicon machine entriesJiancheng Xue2016-07-071-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original patch was to add compatible string for Hi3519 soc and do some cleanup. Since the generic machine entry could meet most of the cases, so I did a further cleanup to reuse it and just keep one machine entry that needs map_io here. Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
| * | ARM: hisi: make unexported symbols staticBen Dooks2016-06-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The two functions hix5hd2_set_scu_boot_addr() and hip01_set_boot_addr() are not declared or exported outside arch/arm/mach-hisi/platsmp.c file. Avoid the following warnings by making them static: arch/arm/mach-hisi/platsmp.c:142:6: warning: symbol 'hip01_set_boot_addr' was not declared. Should it be static? arch/arm/mach-hisi/platsmp.c:106:6: warning: symbol 'hix5hd2_set_scu_boot_addr' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
* | | Merge tag 'omap-for-v4.8/soc-pt2-signed' of ↵Arnd Bergmann2016-07-0712-59/+123
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Merge "Few more omap SoC changes for v4.8 merge window" from Tony Lindgren: - Fix a make randconfig build error for recent SMP kexec changes - A series of clock related fixes to prepare things for moving device clkctrl register handling to drivers/clk * tag 'omap-for-v4.8/soc-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: AM33xx: fix module_wait_ready without clkctrl register ARM: OMAP2+: clockdomain: add usecounting support to autoidle APIs ARM: OMAP2+: timer: change order of hwmod data handling ARM: OMAP2+: hwmod: fetch main_clk based on hwmod name ARM: OMAP2+: omap_device: create clock alias purely from DT data ARM: OMAP2+: Fix build with CONFIG_SMP and CONFIG_PM is not set
| * | | ARM: AM33xx: fix module_wait_ready without clkctrl registerTero Kristo2016-07-041-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the module has no clkctrl register defined, module_wait_ready should not try to access this. This can potentially cause an illegal register access, and result in bad idle reporting also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2+: clockdomain: add usecounting support to autoidle APIsTero Kristo2016-07-047-50/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous implementation was racy in many locations, where the current status of the clockdomain was read out, some operations were executed, and the previous status info was used afterwards to decide next state for the clockdomain. Instead, fix the implementation of the allow_idle / deny_idle APIs to properly have usecounting support. This allows clean handling internally within the clockdomain core, and simplifies the usage also within hwmod. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2+: timer: change order of hwmod data handlingTero Kristo2016-07-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the introduction of hwmod module clocks, the name of the hwmod main clk may not be available before hwmod setup, as hwmod setup may lookup the main clock dynamically based on the hwmod name. Thus, change the order of hwmod setup and main clock handling for the timer code, to make sure the main clock is going to be available. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2+: hwmod: fetch main_clk based on hwmod nameTero Kristo2016-07-041-5/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the transition to hwmod module clocks, all hwmods will have their main clocks named <hwmod_name>_mod_ck. Use this info to fetch main_clk, and use it if found. Also, if a main_clk is found based on the hwmod name, disable the direct PRCM modulemode access from hwmod. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2+: omap_device: create clock alias purely from DT dataTero Kristo2016-07-031-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids the need to add most of the clock aliases under drivers/clk/ti/clk-xyz.c files. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | ARM: OMAP2+: Fix build with CONFIG_SMP and CONFIG_PM is not setTony Lindgren2016-07-032-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I found one more make randconfig build error with the recent SMP kexec changes. We need the mpuss now always available early. Fixes: 0573b957fc21 ("ARM: OMAP4+: Prevent CPU1 related hang with kexec") Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | Merge tag 'renesas-soc2-for-v4.8' of ↵Olof Johansson2016-07-0611-36/+164
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Second Round of Renesas ARM Based SoC Updates for v4.8 * Add DT support to the APMU driver and prioritise DT APMU support * Obtain extal frequency from DT * Add support for r8a7792 * tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: Prioritize DT APMU support ARM: shmobile: r8a7790: Prioritize DT APMU support ARM: shmobile: smp: Add function to prioritize DT SMP ARM: shmobile: apmu: Add APMU DT support via Enable method ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H ARM: shmobile: rcar-gen2: Obtain extal frequency from DT ARM: shmobile: r8a7792: basic SoC support soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init() soc: renesas: rcar-sysc: add R8A7792 support soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions soc: renesas: rcar-sysc: Document r8a7796 support Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: shmobile: r8a7791: Prioritize DT APMU supportMagnus Damm2016-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the r8a7791 SoC support code to not configure any non-DT SMP code in case the DT-based enable-method has been installed already. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | ARM: shmobile: r8a7790: Prioritize DT APMU supportMagnus Damm2016-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the r8a7790 SoC support code to not configure any non-DT SMP code in case the DT-based enable-method has been installed already. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | ARM: shmobile: smp: Add function to prioritize DT SMPMagnus Damm2016-06-292-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function to check if other DT based method is available, and if so return false to not hook up smp_ops from the machine vector. This results in that DT-based SMP support has priority over older C-based smp_ops code, and in case DT-based SMP support code does not exist in the DTB then the old smp_ops code will still work as-is. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | ARM: shmobile: apmu: Add APMU DT support via Enable methodMagnus Damm2016-06-291-4/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow DT configuration of the APMU hardware in the case when the APMU is pointed out in the DTB via the enable-method. The ability to configure the APMU via C code is still kept intact to prevent DTB breakage for older SoCs that do not rely on the enable-method for SMP support. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> [geert: Fix CONFIG_SMP=n build] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functionsGeert Uytterhoeven2016-06-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | shmobile_smp_apmu_prepare_cpus() is used only if CONFIG_SMP=y. Hence move the #ifdef to cover shmobile_smp_apmu_prepare_cpus() and all functions only called by it (apmu_init_cpu() and apmu_parse_cfg()). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2HGeert Uytterhoeven2016-06-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the datasheet, the frequency of the ARM architecture timer on R-Car V2H depends on the frequency of the ZS clock, just like on R-Car E2. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | ARM: shmobile: rcar-gen2: Obtain extal frequency from DTGeert Uytterhoeven2016-06-291-20/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some R-Car Gen2 SoCs, the frequency of the ARM architecture timer depends on the frequency of the external clock crystal. Currently the latter is determined indirectly from the state of the mode pins, which is a relic predating DT. Obtain the external clock crystal frequency from DT instead, removing the dependency on the mode pins. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | ARM: shmobile: r8a7792: basic SoC supportSergei Shtylyov2016-06-293-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal support for the R-Car V2H (R8A7792) SoC. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | Merge branch 'rcar-sysc-for-v4.8' into HEADSimon Horman2016-06-292-10/+2
| |\ \ \ \
| | * | | | soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driverGeert Uytterhoeven2016-06-292-10/+2
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On R-Car H1 and Gen2, the SYSC interrupt registers are always configured using hardcoded values in platform code. For R-Car Gen2, values are provided for H2 and M2-W only, other SoCs are not yet supported, and never will be. Move this configuration from SoC-specific platform code to the rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured from DT. This would be the case not only for H1, H2, and M2-W using a modern DTS, but also for other R-Car Gen2 SoCs not supported by the platform code, relying purely on DT. There is no longer a need to return the mapped register block, hence make the function return void. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | | ARM: tango: fix CONFIG_HOTPLUG_CPU=n buildArnd Bergmann2016-07-061-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building with CONFIG_HOTPLUG_CPU disabled fails for mach-tango: include/linux/stddef.h:7:14: error: excess elements in struct initializer [-Werror] #define NULL ((void *)0) arch/arm/mach-tango/platsmp.c:48:15: note: in expansion of macro 'tango_cpu_kill' .cpu_kill = tango_cpu_kill, the problem as that the .cpu_kill and .cpu_die struct members are unavailable and we must not try to assign them in this configuration. Hiding the two (as all other platforms do too) lets us get rid of the #else clause as well. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | | Merge ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB changes into next/socArnd Bergmann2016-07-0634-67/+56
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * commit '5c34a4e89c743339f78cafb2f2a826a010f0746a': ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB ARM: uniphier: drop code for old DT binding These cause a harmless conflict with the clps711x multiplatform support, and it's easy to resolve. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIBLinus Walleij2016-06-0333-55/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This replaces: - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can now be selected directly. - "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB is now selectable by everyone, so we need not declare our intent to select it. When ordering the symbols the following rationale was used: if the selects were in alphabetical order, I moved select GPIOLIB to be in alphabetical order, but if the selects were not maintained in alphabetical order, I just replaced "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB". Cc: Michael Büsch <m@bues.ch> Cc: arm@kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | ARM: uniphier: drop code for old DT bindingMasahiro Yamada2016-06-031-13/+5
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 307d40c56b0c ("ARM: uniphier: rework SMP code to support new System Bus binding") added a new DT binding for SMP code, but still kept old code for the backward compatibility. Linux 4.6 was out with both bindings supported, so it should not hurt to drop the old code now. Moreover, the mainline code are currently not used for any of our products, so this change has no impact on our customers in any way. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | | ARM: clps711x: Switch to MULTIPLATFORMAlexander Shiyan2016-07-067-340/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch CLPS711X to multiplatform. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | | | ARM: clps711x: Remove boards supportAlexander Shiyan2016-07-063-49/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Any CLPS711X-based board can be replaced with devicetree equivalent. Remove the board files. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | | | ARM: clps711x: Add basic DT supportAlexander Shiyan2016-07-063-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support to run Cirrus Logic ARMv4T CPUs with device-tree support. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | | | ARM: clps711x: Reduce static map sizeAlexander Shiyan2016-07-063-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Last CLPS711X CPU register is PLLR has 0xa5a8 address, so we can reduce the map to 48k and align the end of the static at VMALLOC_START. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | | | Merge tag 'samsung-soc-4.8-2' of ↵Olof Johansson2016-07-0526-46/+65
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc Samsung mach/soc update for v4.8, part 2: 1. Endian-friendly fixes. 2. Maintainers update. * tag 'samsung-soc-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: MAINTAINERS: Extend Samsung SoC entry with S3C/S5P drivers ARM: SAMSUNG: Fix missing s5p_init_cpu() declaration ARM: EXYNOS: Fix UART address selection for DEBUG_LL ARM: EXYNOS: Fixup for __raw operations in suspend.c ARM: SAMSUNG: Fixup usage of __raw IO in PM ARM: EXYNOS: Fixup endian in pm/pmu ARM: EXYNOS: Fixups for big-endian operation ARM: SAMSUNG: Fixup endian issues in CPU detection ARM: EXYNOS: Fixup debug macros for big-endian ARM: s3c24xx: Sort cpufreq tables ARM: SAMSUNG: Fix typos Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | ARM: SAMSUNG: Fix missing s5p_init_cpu() declarationBen Dooks2016-06-223-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The declaration of s5p_init_cpu() in arch/arm/mach-exynos/common.h is not included in the platform file arch/arm/plat-samsung/cpu.c which generates a warning. Fix the following warning by moving the declaration to somewhere both the machine and platform code can get to it, and including the right files as necessary: arch/arm/plat-samsung/cpu.c:47:13: warning: symbol 's5p_init_cpu' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: EXYNOS: Fix UART address selection for DEBUG_LLJoonyoung Shim2016-06-221-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Exynos542x SoCs using A15+A7 can boot to A15 or A7. If it boots using A7 (like on Odroid XU family boards), it can't choose right UART physical address only the part number of CP15. Fix the detection logic by checking the Cluster ID additionally. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> [k.kozlowski: Extend commit message] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: EXYNOS: Fixup for __raw operations in suspend.cBen Dooks2016-06-211-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the PMU code endian access code to deal with kernels built for big endian operation by changing the __raw IO accessors to the _relaxed variants. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: SAMSUNG: Fixup usage of __raw IO in PMBen Dooks2016-06-211-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the use of __raw accesors in pm-common.c to use the _relaxed variants to deal with any issues due to endian related fetches. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: EXYNOS: Fixup endian in pm/pmuBen Dooks2016-06-213-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the PMU code endian access code to deal with kernels built for big endian operation. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: EXYNOS: Fixups for big-endian operationBen Dooks2016-06-213-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the kernel is built big endian, then using the __raw read and write IO accessors is not going to work as they end up writing big-endian data to little-endian IO registers. Fix this by using the readl and writel relaxed versions which ensure little endian IO. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: SAMSUNG: Fixup endian issues in CPU detectionBen Dooks2016-06-211-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the system is built for big endian, then the CPU identificaiton register will be read in the wrong order. Fix this by using readl_relaxed() on the register. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: EXYNOS: Fixup debug macros for big-endianBen Dooks2016-06-211-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exynos low-level debug macros need to be fixed if the system is being built big endian. Add the necessary endian swaps for accessing the registers to get output working again Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: s3c24xx: Sort cpufreq tablesViresh Kumar2016-06-033-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some later changes in cpufreq core require these tables to be sorted based on ascending order of their frequencies. There was only one offender. Fix it and add comments over the arrays. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
| * | | | | ARM: SAMSUNG: Fix typosAndrea Gelmini2016-05-3010-10/+10
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some language typos in comments. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
* | | | | Merge tag 'omap-for-v4.8/soc-signed' of ↵Olof Johansson2016-07-0533-370/+244
|\ \ \ \ \ | | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc SoC related changes for omaps for v4.8 merge window: - A series of DSS platform_data fixes to prepare for DSS driver changes - Add tblck clck aliases for PWM - A series of trivial spelling corrections - Remove bogus eQEP, ePWM and eCAP hwmod entries - A series of McBSP sidetone fixes - Remove QSPI and DSS addresses from hwmod, these come from dts - Fix RSTST register offset for pruss - Make ti81xx_rtc_hwmod static - Remove wrongly defined RSTST offset for PER Domain, note that the subject for this one wrongly has "dts" in the subject - Add support for omap5 and dra7 workaround for 801819 - A series of patches to make kexec work for SMP omaps * tag 'omap-for-v4.8/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (30 commits) ARM: OMAP2+: Fix build if CONFIG_SMP is not set ARM: OMAP4+: Allow kexec on SMP variants ARM: OMAP4+: Reset CPU1 properly for kexec ARM: OMAP4+: Prevent CPU1 related hang with kexec ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec ARM: dts: am43xx: Remove wrongly defined RSTST offset for PER Domain ARM: OMAP: make ti81xx_rtc_hwmod static ARM: AM43XX: hwmod: Fix RSTST register offset for pruss ARM: DRA7: hwmod: remove DSS addresses from hwmod ARM: DRA7: hwmod: Remove QSPI address space entry from hwmod ARM: OMAP2+: McBSP: Remove the old iclk allow/deny idle code ASoC: omap-mcbsp: sidetone: Use the new callback for iclk handling ASoC: omap-mcbsp: Rename omap_mcbsp_sysfs_remove() to omap_mcbsp_cleanup() ARM: OMAP3: pdata-quirks: Add support for McBSP2/3 sidetone handling ARM: OMAP3: McBSP: New callback for McBSP2/3 ICLK idle configuration ARM: OMAP3: hwmod data: Fix McBSP2/3 sidetone data ARM: AM335x/AM437x: hwmod: Remove eQEP, ePWM and eCAP hwmod entries ARM: OMAP2+: Fix typo in sdrc.h ARM: OMAP2+: Fix typo in omap_device.c ARM: OMAP2+: Fix typo in omap4-common.c ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: OMAP2+: Fix build if CONFIG_SMP is not setTony Lindgren2016-06-271-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looks like I only partially fixed up things if CONFIG_SMP is not set for the recent kexec changes. We don't have boot_secondary available without SMP as reported by Arnd. Fixes: 0573b957fc21 ("ARM: OMAP4+: Prevent CPU1 related hang with kexec") Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP4+: Allow kexec on SMP variantsTony Lindgren2016-06-222-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kexec needs omap4_cpu_kill, otherwise kexec will produce on SMP: kexec_load failed: Invalid argument Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP4+: Reset CPU1 properly for kexecTony Lindgren2016-06-221-26/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to reset CPU1 properly for kexec when booting different kernel versions. Otherwise CPU1 will attempt to boot the the previous kernel's start_secondary(). Note that the restctrl register is different from the low-power mode wakeup register CPU1_WAKEUP_NS_PA_ADDR. We need to configure both. Let's fix the issue by defining SoC specific data to initialize things in a more generic way. And let's also standardize omap-smp.c to use soc_is instead of cpu_is while at it. Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: OMAP4+: Prevent CPU1 related hang with kexecTony Lindgren2016-06-224-8/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kexec booted kernels on omap4 will hang early during the boot if the booted kernel is different version from the previous kernel. This is because the previous kernel may have configured low-power mode using CPU1_WAKEUP_NS_PA_ADDR. In that case it points to the previous kernel's omap4_secondary_startup(), and CPU1 can be in low power mode from the previous kernel. When the new kernel configures the CPU1 clockdomain, CPU1 can wake from low power state prematurely during omap44xx_clockdomains_init() running random code. Let's fix the issue by configuring CPU1_WAKEUP_NS_PA_ADDR before we call omap44xx_clockdomains_init(). Note that this is very early during the init, and we will do proper CPU1 reset during SMP init a bit later on in omap4_smp_prepare_cpus(). And we need to do this when SMP is not enabled as the previous kernel may have had it enabled. Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit (git 2.34.1) at 2025-02-25 19:59:12 +0000