aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Expand)AuthorAgeFilesLines
* clk: Add set_rate_and_parent() opStephen Boyd2014-01-161-19/+59
* clk: sirf: re-arch to make the codes support both prima2 and atlas6Barry Song2014-01-167-172/+458
* clk: composite: pass mux_hw into determine_rateMike Turquette2014-01-151-1/+1
* Merge branch 'clk-next-shmobile' into clk-nextMike Turquette2014-01-141-4/+8
|\
| * clk: shmobile: Fix MSTP clock array initializationValentine Barshak2014-01-141-2/+6
| * clk: shmobile: Fix MSTP clock indexValentine Barshak2014-01-141-2/+2
* | Merge tag 'for_3.14/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette2014-01-085-1162/+1284
|\ \
| * | clk: exynos-audss: add support for Exynos 5420Andrew Bresticker2014-01-081-7/+33
| * | clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker2014-01-081-1/+1
| * | clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker2014-01-081-5/+20
| * | clk: exynos-audss: convert to platform deviceAndrew Bresticker2014-01-081-16/+88
| * | clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-47/+34
| * | clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-339/+309
| * | clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-295/+264
| * | clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-455/+402
| * | clk: exynos5250: register APLL rate tableAndrew Bresticker2014-01-081-1/+24
| * | clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat2013-12-301-1/+2
| * | clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa2013-12-301-3/+5
| * | clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa2013-12-301-3/+3
| * | clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa2013-12-301-4/+12
| * | clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa2013-12-301-6/+8
| * | clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa2013-12-301-8/+17
| * | clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa2013-12-301-122/+123
| * | clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa2013-12-301-102/+188
| * | Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa2013-12-303-11/+15
| |\ \
| | * | clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski2013-12-301-5/+5
| | * | clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan2013-12-301-1/+2
| | * | clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan2013-12-301-1/+4
| | * | clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan2013-12-301-1/+1
| | * | clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker2013-12-301-2/+2
| | * | clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim2013-12-301-1/+1
* | | | clk: max77686: Register OF clock providerTomasz Figa2014-01-081-0/+24
* | | | clk: max77686: Refactor driver data handlingTomasz Figa2014-01-081-13/+14
* | | | clk: max77686: Fix clean-up in error and remove pathsTomasz Figa2014-01-081-19/+10
* | | | clk: max77686: Make max77686_clk_register() return struct clk *Tomasz Figa2014-01-081-7/+10
* | | | clk: max77686: Refactor successful exit of probe functionTomasz Figa2014-01-081-2/+1
* | | | clk: max77686: Provide .recalc_rate() operationTomasz Figa2014-01-081-0/+7
* | | | clk: max77686: Correct callback used for checking clock statusTomasz Figa2014-01-081-2/+2
* | | | Merge branch 'clk-next-unregister' into clk-nextMike Turquette2013-12-315-19/+217
|\ \ \ \
| * \ \ \ Merge branch 'clk/clk-unregister' of git://linuxtv.org/snawrocki/samsung into...Mike Turquette2013-12-045-19/+217
| |\ \ \ \
| | * | | | clk: Implement clk_unregisterSylwester Nawrocki2013-12-041-3/+118
| | * | | | clk: Add common __clk_get(), __clk_put() implementationsSylwester Nawrocki2013-12-041-0/+26
| | * | | | clkdev: Fix race condition in clock lookup from device treeSylwester Nawrocki2013-12-041-2/+10
| | * | | | clk: Provide not locked variant of of_clk_get_from_provider()Sylwester Nawrocki2013-12-042-8/+46
| | * | | | omap3isp: Modify clocks registration to avoid circular referencesSylwester Nawrocki2013-12-042-6/+17
* | | | | | Merge branch 'for_3.14/keystone-clk' of git://git.kernel.org/pub/scm/linux/ke...Mike Turquette2013-12-302-8/+28
|\ \ \ \ \ \ | |_|_|_|_|/ |/| | | | |
| * | | | | clk: keystone: gate: fix error handling on initGrygorii Strashko2013-12-101-4/+8
| * | | | | clk: keystone: use clkod register bits for postdivMurali Karicheri2013-12-101-4/+20
| | |_|_|/ | |/| | |
* | | | | Merge tag 'sunxi-clk-3.14-for-mike' of https://bitbucket.org/emiliolopez/linu...Mike Turquette2013-12-293-77/+437
|\ \ \ \ \ | |_|_|_|/ |/| | | |
| * | | | clk: sunxi: Allwinner A20 output clock supportChen-Yu Tsai2013-12-281-0/+57
generated by cgit (git 2.34.1) at 2025-02-27 12:48:14 +0000