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* ASoC: fsl_asrc fsl_esai fsl_sai: allow CONFIG_PM=NMaarten Zanders2022-10-281-1/+1
| | | | | | | | | | | | | | | | | | | When CONFIG_PM=N, pm_runtime_put_sync() returns -ENOSYS which breaks the probe function of these drivers. Other users of pm_runtime_put_sync() typically don't check the return value. In order to keep the program flow as intended, check for -ENOSYS. This commit is similar to commit 0434d3f (omap-mailbox.c). Fixes: cab04ab5900f ("ASoC: fsl_asrc: Don't use devm_regmap_init_mmio_clk") Fixes: 203773e39347 ("ASoC: fsl_esai: Don't use devm_regmap_init_mmio_clk") Fixes: 2277e7e36b4b ("ASoC: fsl_sai: Don't use devm_regmap_init_mmio_clk") Signed-off-by: Maarten Zanders <maarten.zanders@mind.be> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Link: https://lore.kernel.org/r/20221028141129.100702-1-maarten.zanders@mind.be Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Update slots number according to bclk_ratioShengjiu Wang2022-08-231-3/+5
| | | | | | | | | | | The bclk_ratio is set by .set_bclk_ratio API. bclk_ratio = slots * slot_width So if slots is not set by .set_tdm_slot, then it can be calculated by bclk_ratio. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1659681926-13493-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Add support multi fifo sdma scriptShengjiu Wang2022-08-231-1/+36
| | | | | | | | | | | | | | | | | | | With disabling combine mode, the multiple successive FIFO registers or non successive FIFO registers of SAI module can work with the sdma multi fifo script. This patch is to configure the necessary information to the SDMA engine driver for support multi fifo script. 'words_per_fifo' is the channels for each dataline 'n_fifos_src' and 'n_fifos_dst' are the fifo number 'stride_fifos_src' and 'stride_fifos_dst' are the stride between enable FIFOs 'maxburst' is the multiply of datalines Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1661218573-2154-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Remove unnecessary FIFO reset in ISRShengjiu Wang2022-08-171-8/+2
| | | | | | | | | | | | The FIFO reset drops the words in the FIFO, which may cause channel swap when SAI module is running, especially when the DMA speed is low. So it is not good to do FIFO reset in ISR, then remove the operation. Fixes: e2681a1bf5ae ("ASoC: fsl_sai: Add isr to deal with error flag") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1660713867-26921-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: fix incorrect mclk number in error messagePieterjan Camerlynck2022-08-161-1/+1
| | | | | | | | | | | In commit c3ecef21c3f26 ("ASoC: fsl_sai: add sai master mode support") the loop was changed to start iterating from 1 instead of 0. The error message however was not updated, reporting the wrong clock to the user. Signed-off-by: Pieterjan Camerlynck <pieterjan.camerlynck@gmail.com> Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com> Link: https://lore.kernel.org/r/20220813083353.8959-1-pieterjan.camerlynck@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Don't use plain integer as NULL pointerShengjiu Wang2022-07-211-1/+1
| | | | | | | | | | Fix sparse warning: sound/soc/fsl/fsl_sai.c:64:39: sparse: warning: Using plain integer as NULL pointer Fixes: b4ee8a913e61 ("ASoc: fsl_sai: Add pinctrl operation for PDM and DSD") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1658399393-28777-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Add support for PLL switch at runtimeShengjiu Wang2022-07-051-0/+38
| | | | | | | | | | | | | i.MX8MQ/MN/MM/MP platforms typically have 2 AUDIO PLLs being configured to handle 8kHz and 11kHz series audio rates. The patch implements the functionality to select at runtime the appropriate AUDIO PLL as function of sysclk rate. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1656667961-1799-5-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: Refactor non_legacy_dai_naming flagMark Brown2022-06-291-2/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Charles Keepax <ckeepax@opensource.cirrus.com>: Historically, the legacy DAI naming scheme was applied to platform drivers and the newer scheme to CODEC drivers. During componentisation the core lost the knowledge of if a driver was a CODEC or platform, they were all now components. To continue to support the legacy naming on older platform drivers a flag was added to the snd_soc_component_driver structure, non_legacy_dai_naming, to indicate to use the new scheme and this was applied to all CODECs as part of the migration. However, a slight issue appears to be developing with respect to this flag being opt in for the non-legacy scheme, which presumably we want to be the primary scheme used. Many codec drivers appear to forget to include this flag: grep -l -r "snd_soc_component_driver" sound/soc/codecs/*.c | xargs grep -L "non_legacy_dai_naming" | wc 48 48 556 Whilst in many cases the configuration of the DAIs themselves will cause the core to apply the new scheme anyway, it would seem more sensible to change the flag to legacy_dai_naming making the new scheme opt out. This patch series migrates across to such a scheme.
| * ASoC: fsl: Migrate to new style legacy DAI naming flagCharles Keepax2022-06-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | Change the legacy DAI naming flag from opting in to the new scheme (non_legacy_dai_naming), to opting out of it (legacy_dai_naming). These drivers appear to be on the CPU side of the DAI link and currently uses the legacy naming, so add the new flag. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220623125250.2355471-21-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | Add PDM/DSD/dataline configuration supportMark Brown2022-06-281-21/+239
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Shengjiu Wang <shengjiu.wang@nxp.com>: Support PDM format and DSD format. Add new dts property to configure dataline. The SAI has multiple successive FIFO registers, but in some use case the required dataline/FIFOs are not successive.
| * | ASoC: fsl_sai: Configure dataline/FIFO information from dts propertyShengjiu Wang2022-06-271-4/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SAI has multiple successive FIFO registers, but in some use case the required dataline/FIFOs are not successive, so need get such information from dts property "fsl,dataline" fsl,dataline has 3 values for each configuration: first one means the type: I2S(1) or DSD(2), second one is dataline mask for 'rx', third one is dataline mask for 'tx'. Also set dma peripheral address and TRCE bits according to data lane. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Link: https://lore.kernel.org/r/1655451877-16382-8-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: fsl_sai: Make res a member of struct fsl_saiShengjiu Wang2022-06-271-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The resource info need to be accessed by hw_params() function for multi fifo case, the start address may be not the FIFO0. So move it to be a member of struct fsl_sai. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1655451877-16382-6-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoc: fsl_sai: Add pinctrl operation for PDM and DSDShengjiu Wang2022-06-271-9/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With DSD format, the pinctrl is different compare with I2S format, because one dataline only has one channel data, and the codec always mux the LRCLK pin to DSD data line, and on i.MX8MQ the BCLK pin can route to codec on DSD case for the MCLK is too high. Add pinctrl operation that the pinctrl can be switched on runtime according to the I2S format or DSD format Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1655451877-16382-5-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: fsl_sai: Add support for more sample ratesShengjiu Wang2022-06-271-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for more sample rates, because PDM format bitstream has higher sample rates. for example DSD512 format, the bit clock is 22.5792MHz, if the word width is U8_LE, then the max sample rate is 2822400. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1655451877-16382-4-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: fsl_sai: Add PDM daifmt supportShengjiu Wang2022-06-271-2/+15
| |/ | | | | | | | | | | | | | | | | PDM format is used for 1-bit stream, so clear the FBT and SYWD, and the each dataline only has one channel data. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1655451877-16382-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* / ASoC: fsl: fsl_sai: use pm_runtime_resume_and_get()Pierre-Louis Bossart2022-06-271-4/+2
|/ | | | | | | | | | | | Simplify the flow. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20220616220427.136036-8-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: Merge fixesMark Brown2022-06-141-0/+1
|\ | | | | | | Required for more changes for the ops.
| * ASoC: fsl_sai: Add support for i.MX8MNShengjiu Wang2022-06-061-0/+1
| | | | | | | | | | | | | | | | | | The SAI module on i.MX8MN is almost same as i.MX8MP, So reuse same soc data as i.MX8MP. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1653966123-28217-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | Specify clock provider directly to CPU DAIsMark Brown2022-06-091-4/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Charles Keepax <ckeepax@opensource.cirrus.com>: Currently the set_fmt callback always passes clock provider/consumer with respect to the CODEC. This made sense when the framework was directly broken down into platforms and CODECs. However, as things are now broken down into components which can be connected as either the CPU or CODEC side of a DAI link it simplifies things if each side of the link is just told if it is provider or consumer of the clocks. Making this change allows us to remove one of the last parts of the ASoC core that needs to know if a driver is a CODEC driver, where it flips the clock format specifier if a CODEC driver is used on the CPU side of a DAI link, as well as just being conceptually more consistent with componentisation. The basic idea of this patch chain is to change the set_fmt callback from specifying if the CODEC is provider/consumer into directly specifying if the component is provider/consumer. To do this we add some new defines, and then to preserve bisectability, the migration is done by adding a new callback, converting over all existing CPU side drivers, converting the core, and then finally reverting back to the old callback. Converting the platform drivers makes sense as the existing defines are from the perspective of the CODEC and there are more CODEC drivers than platform drivers. Obviously a fair amount of this patch chain I was only able to build test, so any testing that can be done would be greatly appreciated.
| * | ASoC: fsl: Rename set_fmt_new back to set_fmtCharles Keepax2022-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the core has been migrated across to the new direct clock specification we can move the drivers back to the normal set_fmt callback. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220519154318.2153729-36-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: fsl: Update to use set_fmt_new callbackCharles Keepax2022-06-061-5/+5
| |/ | | | | | | | | | | | | | | | | | | As part of updating the core to directly tell drivers if they are clock provider or consumer update these CPU side drivers to use the new direct callback. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220519154318.2153729-9-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | ASoC: fsl_sai: Enable MCTL_MCLK_EN bit for master modeShengjiu Wang2022-06-081-0/+6
| | | | | | | | | | | | | | | | | | | | | | On i.MX8MM, the MCTL_MCLK_EN bit it is not only the gate for MCLK output to PAD, but also the gate bit between root clock and SAI module, So it is need to be enabled for master mode, otherwise there is no bclk generated. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1652963808-14515-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | ASoC: fsl_sai: add error message in case of missing imx-pcm-dma supportMarco Felsch2022-06-061-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the imx-pcm-dma is required we need to have the module enabled. For all NXP/FSL sound cards using the ASoC architecture this is the case but in case of using the simple-audio-card sound card this isn't the case. In such case the driver probe fails silently and the card isn't available. It took a while to find the missing Kconfig. Make this easier for others by printing a error if this the module isn't available but required by the HW. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com> Link: https://lore.kernel.org/r/20220601092342.3328644-3-m.felsch@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | ASoC: fsl_sai: use local device pointerMarco Felsch2022-06-061-26/+27
|/ | | | | | | | | | Use a local variable to dereference the device pointer once and use the local variable in further calls. No functional changes. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com> Link: https://lore.kernel.org/r/20220601092342.3328644-1-m.felsch@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Add support for i.MX8ULPShengjiu Wang2022-05-161-1/+13
| | | | | | | | | | | Add i.MX8ULP specific soc data, the max register is FSL_SAI_RTCAP the IP version is also 0x0301, So version can't be used for the condition of register FSL_SAI_MCTL setting. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/1652688372-10274-4-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Add support for i.MX8M PlusShengjiu Wang2022-05-161-0/+12
| | | | | | | | | Add i.MX8M Plus specific soc data, the max register is FSL_SAI_MDIV. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/1652688372-10274-3-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Add support for i.MX8MMShengjiu Wang2022-05-161-0/+17
| | | | | | | | | | | | On i.MX8MM the max register is FSL_SAI_MCTL, which is different with previous platform, so add max_register in soc data to distinguish platforms. And add specific soc data for i.MX8MM Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/1652688372-10274-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: fix 1:1 bclk:mclk ratio supportAhmad Fatoum2022-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | Refactoring in commit a50b7926d015 ("ASoC: fsl_sai: implement 1:1 bclk:mclk ratio support") led to the bypass never happening as (ratio = 1) was caught in the existing if (ratio & 1) continue; check. The correct check sequence instead is: - skip all ratios lower than one and higher than 512 - skip all odd ratios except for 1:1 - skip 1:1 ratio if and only if !support_1_1_ratio And for all others, calculate the appropriate divider. Adjust the code to facilitate this. Fixes: a50b7926d015 ("ASoC: fsl_sai: implement 1:1 bclk:mclk ratio support") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220405155731.745413-1-a.fatoum@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: implement 1:1 bclk:mclk ratio supportAhmad Fatoum2022-03-071-2/+15
| | | | | | | | | | | | With higher channel counts, we may need higher clock rates. Starting with SAI v3.1 (i.MX8MM), we can bypass the divider and get a 1:1 bclk:mclk ratio. Add the necessary support. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220302083428.3804687-8-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: use DIV_ROUND_CLOSEST() to calculate dividerSascha Hauer2022-03-071-7/+5
| | | | | | | | | | | In fsl_sai_set_bclk() we want to calculate the divider that gets us closest to the desired frequency, so use DIV_ROUND_CLOSEST() instead of just doing a clk_rate/freq. Also discard invalid ratios earlier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220302083428.3804687-7-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Use better variable namesSascha Hauer2022-03-071-8/+9
| | | | | | | | | | | "ret" is normally used as a variable name for return values. In fsl_sai_set_bclk() it stores the difference between the desired rate and the rate we can archieve, so rename it to "diff". Also rename "savesub" to "bestdiff" as that stores the best difference we have found. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220302083428.3804687-6-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: store full version instead of major/minorSascha Hauer2022-03-071-5/+3
| | | | | | | | | | | | | The driver tests for the hardware revision being newer than 3.1 with (sai->verid.major >= 3 && sai->verid.minor >= 1). The result is obviously wrong for hardware revision 4.0. Fix this by storing the full version in a single variable and comparing to that one. No practical change at the moment as there is no 4.0 ip version currently. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220302083428.3804687-5-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: simplify register poking in fsl_sai_set_bclkAhmad Fatoum2022-03-071-16/+13
| | | | | | | | | | | | | Depending on SAI synchronization mode, the same value is either written to FSL_SAI_TCR2 or FSL_SAI_RCR2 or nothing is written at all. As the computation is the same either way, factor it out to make it clearer what the difference is. No functional change. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220302083428.3804687-4-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: simplify irq return valueSascha Hauer2022-03-071-7/+4
| | | | | | | | | | Instead of using a boolean "irq_none" to describe the interrupt handlers return value use a variable of type irqreturn_t and return it directly. No functional change. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220302083428.3804687-3-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Drop unnecessary definesSascha Hauer2022-03-071-10/+6
| | | | | | | | | | | The fsl_sai driver has FSL_FMT_TRANSMITTER and FSL_FMT_RECEIVER defines which are used in a single function only then are then only translated into a bool 'tx' variable. Drop the defines and pass the boolean value directly to fsl_sai_set_dai_sysclk_tr(). No functional change. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220302083428.3804687-2-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl: Drop unused argument from imx_pcm_dma_init()Sascha Hauer2022-02-281-1/+1
| | | | | | | | | | | Since 70d435ba1cd ("ASoC: imx-pcm-dma: simplify pcm_config") the size argument to imx_pcm_dma_init() is unused, so drop it. Also remove the now unused defines that the users of imx_pcm_dma_init() used to pass the size argument Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220223130625.3430589-1-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Enable combine mode softSascha Hauer2022-02-081-0/+9
| | | | | | | | | | | | | | | The fsl_sai driver calculates the number of pins used and enables multiple channels if necessary. This means the SAI expects data in one FIFO per pin. The SDMA engine only services a single FIFO, so multi pin support doesn't work at all. This patch enables the software combine mode in chips that support it. With this the SAI presents only a single FIFO to the outside and distributes the data into the different FIFOs internally. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220111081518.982437-1-s.hauer@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Update to modern clocking terminologyMark Brown2021-09-221-17/+17
| | | | | | | | | | As part of moving to remove the old style defines for the bus clocks update the fsl_sai driver to use more modern terminology for clocking. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20210921213542.31688-6-broonie@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: register platform component before registering cpu daiShengjiu Wang2021-09-101-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | There is no defer probe when adding platform component to snd_soc_pcm_runtime(rtd), the code is in snd_soc_add_pcm_runtime() snd_soc_register_card() -> snd_soc_bind_card() -> snd_soc_add_pcm_runtime() -> adding cpu dai -> adding codec dai -> adding platform component. So if the platform component is not ready at that time, then the sound card still registered successfully, but platform component is empty, the sound card can't be used. As there is defer probe checking for cpu dai component, then register platform component before cpu dai to avoid such issue. Fixes: 435508214942 ("ASoC: Add SAI SoC Digital Audio Interface driver") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1630665006-31437-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Use devm_platform_get_and_ioremap_resource()Yang Yingliang2021-06-211-2/+1
| | | | | | | | | Use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210615013922.784296-7-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Don't use devm_regmap_init_mmio_clkShengjiu Wang2021-03-221-16/+32
| | | | | | | | | | | | | | | | | | | | | | When there is power domain bind with bus clock, The call flow: devm_regmap_init_mmio_clk - clk_prepare() - clk_pm_runtime_get() cause the power domain of clock always be enabled after regmap_init(). which impact the power consumption. So use devm_regmap_init_mmio instead of devm_regmap_init_mmio_clk, then explicitly enable clock when using by pm_runtime_get(), if CONFIG_PM=n, then fsl_sai_runtime_resume will be explicitly called. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Link: https://lore.kernel.org/r/1616141203-13344-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge series "drop unneeded snd_soc_dai_set_drvdata" from Julia Lawall ↵Mark Brown2021-03-101-2/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <Julia.Lawall@inria.fr>: snd_soc_dai_set_drvdata is not needed when the set data comes from snd_soc_dai_get_drvdata or dev_get_drvdata. --- sound/soc/fsl/fsl_micfil.c | 2 -- sound/soc/fsl/fsl_sai.c | 2 -- sound/soc/fsl/fsl_xcvr.c | 1 - sound/soc/mxs/mxs-saif.c | 10 ---------- sound/soc/pxa/mmp-sspa.c | 1 - sound/soc/sunxi/sun4i-i2s.c | 2 -- 6 files changed, 18 deletions(-)
| * ASoC: fsl: drop unneeded snd_soc_dai_set_drvdataJulia Lawall2021-03-101-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | snd_soc_dai_set_drvdata is not needed when the set data comes from snd_soc_dai_get_drvdata or dev_get_drvdata. The problem was fixed usingthe following semantic patch: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,y,e; @@ x = dev_get_drvdata(y->dev) ... when != x = e - snd_soc_dai_set_drvdata(y,x); @@ expression x,y,e; @@ x = snd_soc_dai_get_drvdata(y) ... when != x = e - snd_soc_dai_set_drvdata(y,x); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Link: https://lore.kernel.org/r/20210213101907.1318496-5-Julia.Lawall@inria.fr Signed-off-by: Mark Brown <broonie@kernel.org>
* | ASoC: fsl_sai: Add pm qos cpu latency supportShengjiu Wang2021-03-101-0/+12
|/ | | | | | | | | | | On SoCs such as i.MX7ULP, cpuidle has some levels which may disable system/bus clocks, so need to add pm_qos to prevent cpuidle from entering low level idles and make sure system/bus clocks are enabled when sai is active. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1613983220-5373-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl: sync parameter naming (rate/sample_bits)Kuninori Morimoto2021-01-211-4/+4
| | | | | | | | | | | | | | This patch syncs naming rule. - xxx_rates; + xxx_rate; - xxx_samplebits; + xxx_sample_bits; Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87eeimolh5.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: fsl_sai: Correct the clock source for mclk0Shengjiu Wang2020-11-191-2/+18
| | | | | | | | | | | | | | | | On VF610, mclk0 = bus_clk; On i.MX6SX/6UL/6ULL/7D, mclk0 = mclk1; On i.MX7ULP, mclk0 = bus_clk; On i.MX8QM/8QXP, mclk0 = bus_clk; On i.MX8MQ/8MN/8MM/8MP, mclk0 = bus_clk; So add variable mclk0_is_mclk1 in fsl_sai_soc_data to distinguish these platforms. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Link: https://lore.kernel.org/r/1605768038-4582-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge remote-tracking branch 'asoc/for-5.10' into asoc-nextMark Brown2020-10-091-91/+199
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| * ASoC: fsl_sai: Set MCLK input or output directionShengjiu Wang2020-09-171-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | SAI support select MCLK direction with version.major > 3 and version.minor > 1, the default direction is input, set it to be output according to DT property. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/1600323079-5317-4-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: fsl_sai: Add fsl_sai_check_version functionShengjiu Wang2020-09-171-0/+47
| | | | | | | | | | | | | | | | | | | | | | fsl_sai_check_version can help to parse the version info in VERID and PARAM registers. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/1600323079-5317-3-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: fsl_sai: Add new added registers and new bit definitionShengjiu Wang2020-09-171-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | On i.MX8MQ/i.MX8MN/i.MX8MM platform, the sai IP is upgraded. There are some new registers and new bit definition. This patch is to complete the register list. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/1600323079-5317-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit (git 2.34.1) at 2025-03-04 06:56:02 +0000