From 4a6a3ea392306b04fc687d4314efba562121cc9a Mon Sep 17 00:00:00 2001 From: Andrew Bresticker Date: Thu, 18 Sep 2014 14:47:26 -0700 Subject: irqchip: mips-gic: Use separate edge/level irq_chips GIC edge-triggered interrupts must be acknowledged by clearing the edge detector via a write to GIC_SH_WEDGE. Create a separate edge-triggered irq_chip with the appropriate irq_ack() callback. This also allows us to get rid of gic_irq_flags. Signed-off-by: Andrew Bresticker Acked-by: Jason Cooper Reviewed-by: Qais Yousef Tested-by: Qais Yousef Cc: Thomas Gleixner Cc: Jeffrey Deans Cc: Markos Chandras Cc: Paul Burton Cc: Jonas Gorski Cc: John Crispin Cc: David Daney Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7818/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/gic.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/mips/include/asm/gic.h') diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index 8d1e457c0af9..f2453958cbe5 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h @@ -345,7 +345,6 @@ extern unsigned int gic_present; extern unsigned int gic_frequency; extern unsigned long _gic_base; -extern unsigned int gic_irq_flags[]; extern unsigned int gic_cpu_pin; extern void gic_init(unsigned long gic_base_addr, -- cgit