From d4f7423efdd1419b17524d090ff9ff4024bcf09b Mon Sep 17 00:00:00 2001 From: Pu Wen Date: Sun, 23 Sep 2018 17:33:44 +0800 Subject: x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana The Hygon Dhyana CPU has a topology extensions bit in CPUID. With this bit, the kernel can get the cache information. So add support in cpuid4_cache_lookup_regs() to get the correct cache size. The Hygon Dhyana CPU also discovers num_cache_leaves via CPUID leaf 0x8000001d, so add support to it in find_num_cache_leaves(). Also add cacheinfo_hygon_init_llc_id() and init_hygon_cacheinfo() functions to initialize Dhyana cache info. Setup cache cpumap in the same way as AMD does. Signed-off-by: Pu Wen Signed-off-by: Borislav Petkov Reviewed-by: Borislav Petkov Cc: bp@alien8.de Cc: tglx@linutronix.de Cc: mingo@redhat.com Cc: hpa@zytor.com Cc: x86@kernel.org Cc: thomas.lendacky@amd.com Link: https://lkml.kernel.org/r/2a686b2ac0e2f5a1f2f5f101124d9dd44f949731.1537533369.git.puwen@hygon.cn --- arch/x86/kernel/cpu/hygon.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/x86/kernel/cpu/hygon.c') diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c index a43d5f1f8b41..cf25405444ab 100644 --- a/arch/x86/kernel/cpu/hygon.c +++ b/arch/x86/kernel/cpu/hygon.c @@ -87,6 +87,7 @@ static void hygon_get_topology(struct cpuinfo_x86 *c) if (!err) c->x86_coreid_bits = get_count_order(c->x86_max_cores); + cacheinfo_hygon_init_llc_id(c, cpu, node_id); } else if (cpu_has(c, X86_FEATURE_NODEID_MSR)) { u64 value; @@ -321,6 +322,8 @@ static void init_hygon(struct cpuinfo_x86 *c) hygon_get_topology(c); srat_detect_node(c); + init_hygon_cacheinfo(c); + if (cpu_has(c, X86_FEATURE_XMM2)) { unsigned long long val; int ret; -- cgit