From 5cf6d876a7d05fdd893c74b4c274bbe78fbe9698 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 21 May 2019 10:11:22 +0000 Subject: clk: at91: sckc: sama5d4 has no bypass support The slow clock of SAMA5D4 has no bypass support thus remove it. Signed-off-by: Claudiu Beznea Acked-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index e76b1d64e905..6c55a7a86f79 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -429,7 +429,6 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) struct clk_init_data init; const char *xtal_name; const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; - bool bypass; int ret; if (!regbase) @@ -443,8 +442,6 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) xtal_name = of_clk_get_parent_name(np, 0); - bypass = of_property_read_bool(np, "atmel,osc-bypass"); - osc = kzalloc(sizeof(*osc), GFP_KERNEL); if (!osc) return; @@ -459,9 +456,6 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) osc->sckcr = regbase; osc->startup_usec = 1200000; - if (bypass) - writel((readl(regbase) | AT91_SCKC_OSC32BYP), regbase); - hw = &osc->hw; ret = clk_hw_register(NULL, &osc->hw); if (ret) { -- cgit From abaceffc88ebf510ffb95380985cb3da16d7aa9d Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 21 May 2019 10:11:26 +0000 Subject: clk: at91: sckc: add support to specify registers bit offsets Different IPs uses different bit offsets in registers for the same functionality, thus adapt the driver to support this. Signed-off-by: Claudiu Beznea Acked-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 93 ++++++++++++++++++++++++++++++++----------------- 1 file changed, 61 insertions(+), 32 deletions(-) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 6c55a7a86f79..ab18b1da269f 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -23,14 +23,18 @@ SLOW_CLOCK_FREQ) #define AT91_SCKC_CR 0x00 -#define AT91_SCKC_RCEN (1 << 0) -#define AT91_SCKC_OSC32EN (1 << 1) -#define AT91_SCKC_OSC32BYP (1 << 2) -#define AT91_SCKC_OSCSEL (1 << 3) + +struct clk_slow_bits { + u32 cr_rcen; + u32 cr_osc32en; + u32 cr_osc32byp; + u32 cr_oscsel; +}; struct clk_slow_osc { struct clk_hw hw; void __iomem *sckcr; + const struct clk_slow_bits *bits; unsigned long startup_usec; }; @@ -39,6 +43,7 @@ struct clk_slow_osc { struct clk_sama5d4_slow_osc { struct clk_hw hw; void __iomem *sckcr; + const struct clk_slow_bits *bits; unsigned long startup_usec; bool prepared; }; @@ -48,6 +53,7 @@ struct clk_sama5d4_slow_osc { struct clk_slow_rc_osc { struct clk_hw hw; void __iomem *sckcr; + const struct clk_slow_bits *bits; unsigned long frequency; unsigned long accuracy; unsigned long startup_usec; @@ -58,6 +64,7 @@ struct clk_slow_rc_osc { struct clk_sam9x5_slow { struct clk_hw hw; void __iomem *sckcr; + const struct clk_slow_bits *bits; u8 parent; }; @@ -69,10 +76,10 @@ static int clk_slow_osc_prepare(struct clk_hw *hw) void __iomem *sckcr = osc->sckcr; u32 tmp = readl(sckcr); - if (tmp & (AT91_SCKC_OSC32BYP | AT91_SCKC_OSC32EN)) + if (tmp & (osc->bits->cr_osc32byp | osc->bits->cr_osc32en)) return 0; - writel(tmp | AT91_SCKC_OSC32EN, sckcr); + writel(tmp | osc->bits->cr_osc32en, sckcr); usleep_range(osc->startup_usec, osc->startup_usec + 1); @@ -85,10 +92,10 @@ static void clk_slow_osc_unprepare(struct clk_hw *hw) void __iomem *sckcr = osc->sckcr; u32 tmp = readl(sckcr); - if (tmp & AT91_SCKC_OSC32BYP) + if (tmp & osc->bits->cr_osc32byp) return; - writel(tmp & ~AT91_SCKC_OSC32EN, sckcr); + writel(tmp & ~osc->bits->cr_osc32en, sckcr); } static int clk_slow_osc_is_prepared(struct clk_hw *hw) @@ -97,10 +104,10 @@ static int clk_slow_osc_is_prepared(struct clk_hw *hw) void __iomem *sckcr = osc->sckcr; u32 tmp = readl(sckcr); - if (tmp & AT91_SCKC_OSC32BYP) + if (tmp & osc->bits->cr_osc32byp) return 1; - return !!(tmp & AT91_SCKC_OSC32EN); + return !!(tmp & osc->bits->cr_osc32en); } static const struct clk_ops slow_osc_ops = { @@ -114,7 +121,8 @@ at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, const char *parent_name, unsigned long startup, - bool bypass) + bool bypass, + const struct clk_slow_bits *bits) { struct clk_slow_osc *osc; struct clk_hw *hw; @@ -137,10 +145,11 @@ at91_clk_register_slow_osc(void __iomem *sckcr, osc->hw.init = &init; osc->sckcr = sckcr; osc->startup_usec = startup; + osc->bits = bits; if (bypass) - writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP, - sckcr); + writel((readl(sckcr) & ~osc->bits->cr_osc32en) | + osc->bits->cr_osc32byp, sckcr); hw = &osc->hw; ret = clk_hw_register(NULL, &osc->hw); @@ -173,7 +182,7 @@ static int clk_slow_rc_osc_prepare(struct clk_hw *hw) struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); void __iomem *sckcr = osc->sckcr; - writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr); + writel(readl(sckcr) | osc->bits->cr_rcen, sckcr); usleep_range(osc->startup_usec, osc->startup_usec + 1); @@ -185,14 +194,14 @@ static void clk_slow_rc_osc_unprepare(struct clk_hw *hw) struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); void __iomem *sckcr = osc->sckcr; - writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr); + writel(readl(sckcr) & ~osc->bits->cr_rcen, sckcr); } static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw) { struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); - return !!(readl(osc->sckcr) & AT91_SCKC_RCEN); + return !!(readl(osc->sckcr) & osc->bits->cr_rcen); } static const struct clk_ops slow_rc_osc_ops = { @@ -208,7 +217,8 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr, const char *name, unsigned long frequency, unsigned long accuracy, - unsigned long startup) + unsigned long startup, + const struct clk_slow_bits *bits) { struct clk_slow_rc_osc *osc; struct clk_hw *hw; @@ -230,6 +240,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr, osc->hw.init = &init; osc->sckcr = sckcr; + osc->bits = bits; osc->frequency = frequency; osc->accuracy = accuracy; osc->startup_usec = startup; @@ -255,14 +266,14 @@ static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index) tmp = readl(sckcr); - if ((!index && !(tmp & AT91_SCKC_OSCSEL)) || - (index && (tmp & AT91_SCKC_OSCSEL))) + if ((!index && !(tmp & slowck->bits->cr_oscsel)) || + (index && (tmp & slowck->bits->cr_oscsel))) return 0; if (index) - tmp |= AT91_SCKC_OSCSEL; + tmp |= slowck->bits->cr_oscsel; else - tmp &= ~AT91_SCKC_OSCSEL; + tmp &= ~slowck->bits->cr_oscsel; writel(tmp, sckcr); @@ -275,7 +286,7 @@ static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw) { struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw); - return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL); + return !!(readl(slowck->sckcr) & slowck->bits->cr_oscsel); } static const struct clk_ops sam9x5_slow_ops = { @@ -287,7 +298,8 @@ static struct clk_hw * __init at91_clk_register_sam9x5_slow(void __iomem *sckcr, const char *name, const char **parent_names, - int num_parents) + int num_parents, + const struct clk_slow_bits *bits) { struct clk_sam9x5_slow *slowck; struct clk_hw *hw; @@ -309,7 +321,8 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr, slowck->hw.init = &init; slowck->sckcr = sckcr; - slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL); + slowck->bits = bits; + slowck->parent = !!(readl(sckcr) & slowck->bits->cr_oscsel); hw = &slowck->hw; ret = clk_hw_register(NULL, &slowck->hw); @@ -322,7 +335,8 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr, } static void __init at91sam9x5_sckc_register(struct device_node *np, - unsigned int rc_osc_startup_us) + unsigned int rc_osc_startup_us, + const struct clk_slow_bits *bits) { const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; void __iomem *regbase = of_iomap(np, 0); @@ -335,7 +349,8 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, return; hw = at91_clk_register_slow_rc_osc(regbase, parent_names[0], 32768, - 50000000, rc_osc_startup_us); + 50000000, rc_osc_startup_us, + bits); if (IS_ERR(hw)) return; @@ -358,11 +373,12 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, return; hw = at91_clk_register_slow_osc(regbase, parent_names[1], xtal_name, - 1200000, bypass); + 1200000, bypass, bits); if (IS_ERR(hw)) return; - hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2); + hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2, + bits); if (IS_ERR(hw)) return; @@ -373,16 +389,23 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, of_clk_add_hw_provider(child, of_clk_hw_simple_get, hw); } +static const struct clk_slow_bits at91sam9x5_bits = { + .cr_rcen = BIT(0), + .cr_osc32en = BIT(1), + .cr_osc32byp = BIT(2), + .cr_oscsel = BIT(3), +}; + static void __init of_at91sam9x5_sckc_setup(struct device_node *np) { - at91sam9x5_sckc_register(np, 75); + at91sam9x5_sckc_register(np, 75, &at91sam9x5_bits); } CLK_OF_DECLARE(at91sam9x5_clk_sckc, "atmel,at91sam9x5-sckc", of_at91sam9x5_sckc_setup); static void __init of_sama5d3_sckc_setup(struct device_node *np) { - at91sam9x5_sckc_register(np, 500); + at91sam9x5_sckc_register(np, 500, &at91sam9x5_bits); } CLK_OF_DECLARE(sama5d3_clk_sckc, "atmel,sama5d3-sckc", of_sama5d3_sckc_setup); @@ -398,7 +421,7 @@ static int clk_sama5d4_slow_osc_prepare(struct clk_hw *hw) * Assume that if it has already been selected (for example by the * bootloader), enough time has aready passed. */ - if ((readl(osc->sckcr) & AT91_SCKC_OSCSEL)) { + if ((readl(osc->sckcr) & osc->bits->cr_oscsel)) { osc->prepared = true; return 0; } @@ -421,6 +444,10 @@ static const struct clk_ops sama5d4_slow_osc_ops = { .is_prepared = clk_sama5d4_slow_osc_is_prepared, }; +static const struct clk_slow_bits at91sama5d4_bits = { + .cr_oscsel = BIT(3), +}; + static void __init of_sama5d4_sckc_setup(struct device_node *np) { void __iomem *regbase = of_iomap(np, 0); @@ -455,6 +482,7 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) osc->hw.init = &init; osc->sckcr = regbase; osc->startup_usec = 1200000; + osc->bits = &at91sama5d4_bits; hw = &osc->hw; ret = clk_hw_register(NULL, &osc->hw); @@ -463,7 +491,8 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) return; } - hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2); + hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2, + &at91sama5d4_bits); if (IS_ERR(hw)) return; -- cgit From 04bcc4275e601d5928beaf21e888017d4b7ad3d1 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Tue, 21 May 2019 10:11:33 +0000 Subject: clk: at91: sckc: add support for SAM9X60 Add support for SAM9X60's slow clock. Signed-off-by: Claudiu Beznea Acked-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index ab18b1da269f..1f0f1cd06387 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -410,6 +410,80 @@ static void __init of_sama5d3_sckc_setup(struct device_node *np) CLK_OF_DECLARE(sama5d3_clk_sckc, "atmel,sama5d3-sckc", of_sama5d3_sckc_setup); +static const struct clk_slow_bits at91sam9x60_bits = { + .cr_osc32en = BIT(1), + .cr_osc32byp = BIT(2), + .cr_oscsel = BIT(24), +}; + +static void __init of_sam9x60_sckc_setup(struct device_node *np) +{ + void __iomem *regbase = of_iomap(np, 0); + struct clk_hw_onecell_data *clk_data; + struct clk_hw *slow_rc, *slow_osc; + const char *xtal_name; + const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; + bool bypass; + int ret; + + if (!regbase) + return; + + slow_rc = clk_hw_register_fixed_rate(NULL, parent_names[0], NULL, 0, + 32768); + if (IS_ERR(slow_rc)) + return; + + xtal_name = of_clk_get_parent_name(np, 0); + if (!xtal_name) + goto unregister_slow_rc; + + bypass = of_property_read_bool(np, "atmel,osc-bypass"); + slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], + xtal_name, 5000000, bypass, + &at91sam9x60_bits); + if (IS_ERR(slow_osc)) + goto unregister_slow_rc; + + clk_data = kzalloc(sizeof(*clk_data) + (2 * sizeof(struct clk_hw *)), + GFP_KERNEL); + if (!clk_data) + goto unregister_slow_osc; + + /* MD_SLCK and TD_SLCK. */ + clk_data->num = 2; + clk_data->hws[0] = clk_hw_register_fixed_rate(NULL, "md_slck", + parent_names[0], + 0, 32768); + if (IS_ERR(clk_data->hws[0])) + goto clk_data_free; + + clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck", + parent_names, 2, + &at91sam9x60_bits); + if (IS_ERR(clk_data->hws[1])) + goto unregister_md_slck; + + ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data); + if (WARN_ON(ret)) + goto unregister_td_slck; + + return; + +unregister_td_slck: + clk_hw_unregister(clk_data->hws[1]); +unregister_md_slck: + clk_hw_unregister(clk_data->hws[0]); +clk_data_free: + kfree(clk_data); +unregister_slow_osc: + clk_hw_unregister(slow_osc); +unregister_slow_rc: + clk_hw_unregister(slow_rc); +} +CLK_OF_DECLARE(sam9x60_clk_sckc, "microchip,sam9x60-sckc", + of_sam9x60_sckc_setup); + static int clk_sama5d4_slow_osc_prepare(struct clk_hw *hw) { struct clk_sama5d4_slow_osc *osc = to_clk_sama5d4_slow_osc(hw); -- cgit From 7fb791d07954910ced6edbecc60c07b7191a39cf Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 27 Jun 2019 18:53:39 +0300 Subject: clk: at91: sckc: add support to free slow oscillator Add support to free slow oscillator resources. Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 1f0f1cd06387..3f84d58d06a5 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -161,6 +161,14 @@ at91_clk_register_slow_osc(void __iomem *sckcr, return hw; } +static void at91_clk_unregister_slow_osc(struct clk_hw *hw) +{ + struct clk_slow_osc *osc = to_clk_slow_osc(hw); + + clk_hw_unregister(hw); + kfree(osc); +} + static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { -- cgit From 036702468c9112f65abc58cce6770e01e41996a9 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 27 Jun 2019 18:53:40 +0300 Subject: clk: at91: sckc: add support to free slow rc oscillator Add support to free slow rc oscillator resources. Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 3f84d58d06a5..4b0fcfd29f82 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -263,6 +263,14 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr, return hw; } +static void at91_clk_unregister_slow_rc_osc(struct clk_hw *hw) +{ + struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); + + clk_hw_unregister(hw); + kfree(osc); +} + static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index) { struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw); -- cgit From 016d22dd10eac723815adb6befdbf265a76d2383 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 27 Jun 2019 18:53:41 +0300 Subject: clk: at91: sckc: add support to free slow clock osclillator Add support to free slow clock oscillator resources. Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 4b0fcfd29f82..68a818e69325 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -350,6 +350,14 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr, return hw; } +static void at91_clk_unregister_sam9x5_slow(struct clk_hw *hw) +{ + struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw); + + clk_hw_unregister(hw); + kfree(slowck); +} + static void __init at91sam9x5_sckc_register(struct device_node *np, unsigned int rc_osc_startup_us, const struct clk_slow_bits *bits) -- cgit From 82e25dc8f6bef3e08d7b58720f8812c12f2e3a89 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 27 Jun 2019 18:53:42 +0300 Subject: clk: at91: sckc: improve error path for sam9x5 sck register Improve error path for sam9x5 slow clock registration. Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 50 +++++++++++++++++++++++++++++++------------------ 1 file changed, 32 insertions(+), 18 deletions(-) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 68a818e69325..0641f9b37333 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -366,16 +366,17 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, void __iomem *regbase = of_iomap(np, 0); struct device_node *child = NULL; const char *xtal_name; - struct clk_hw *hw; + struct clk_hw *slow_rc, *slow_osc, *slowck; bool bypass; + int ret; if (!regbase) return; - hw = at91_clk_register_slow_rc_osc(regbase, parent_names[0], 32768, - 50000000, rc_osc_startup_us, - bits); - if (IS_ERR(hw)) + slow_rc = at91_clk_register_slow_rc_osc(regbase, parent_names[0], + 32768, 50000000, + rc_osc_startup_us, bits); + if (IS_ERR(slow_rc)) return; xtal_name = of_clk_get_parent_name(np, 0); @@ -383,7 +384,7 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, /* DT backward compatibility */ child = of_get_compatible_child(np, "atmel,at91sam9x5-clk-slow-osc"); if (!child) - return; + goto unregister_slow_rc; xtal_name = of_clk_get_parent_name(child, 0); bypass = of_property_read_bool(child, "atmel,osc-bypass"); @@ -394,23 +395,36 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, } if (!xtal_name) - return; - - hw = at91_clk_register_slow_osc(regbase, parent_names[1], xtal_name, - 1200000, bypass, bits); - if (IS_ERR(hw)) - return; + goto unregister_slow_rc; - hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2, - bits); - if (IS_ERR(hw)) - return; + slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], + xtal_name, 1200000, bypass, bits); + if (IS_ERR(slow_osc)) + goto unregister_slow_rc; - of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw); + slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, + 2, bits); + if (IS_ERR(slowck)) + goto unregister_slow_osc; /* DT backward compatibility */ if (child) - of_clk_add_hw_provider(child, of_clk_hw_simple_get, hw); + ret = of_clk_add_hw_provider(child, of_clk_hw_simple_get, + slowck); + else + ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, slowck); + + if (WARN_ON(ret)) + goto unregister_slowck; + + return; + +unregister_slowck: + at91_clk_unregister_sam9x5_slow(slowck); +unregister_slow_osc: + at91_clk_unregister_slow_osc(slow_osc); +unregister_slow_rc: + at91_clk_unregister_slow_rc_osc(slow_rc); } static const struct clk_slow_bits at91sam9x5_bits = { -- cgit From 8c938c2d00c14e6af0c3401d31443d2fd626b664 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 27 Jun 2019 18:53:43 +0300 Subject: clk: at91: sckc: remove unnecessary line Remove unnecessary line. Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index 0641f9b37333..a9c2ad68e155 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -596,7 +596,6 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) osc->startup_usec = 1200000; osc->bits = &at91sama5d4_bits; - hw = &osc->hw; ret = clk_hw_register(NULL, &osc->hw); if (ret) { kfree(osc); -- cgit From d09e6ca1381fee498f3fd0431800617daffb8fd4 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 27 Jun 2019 18:53:44 +0300 Subject: clk: at91: sckc: improve error path for sama5d4 sck registration Improve error path for sama5d4 sck registration. Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 43 ++++++++++++++++++++++++++++--------------- 1 file changed, 28 insertions(+), 15 deletions(-) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index a9c2ad68e155..e216bb613562 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -563,7 +563,7 @@ static const struct clk_slow_bits at91sama5d4_bits = { static void __init of_sama5d4_sckc_setup(struct device_node *np) { void __iomem *regbase = of_iomap(np, 0); - struct clk_hw *hw; + struct clk_hw *slow_rc, *slowck; struct clk_sama5d4_slow_osc *osc; struct clk_init_data init; const char *xtal_name; @@ -573,17 +573,18 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) if (!regbase) return; - hw = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0], - NULL, 0, 32768, - 250000000); - if (IS_ERR(hw)) + slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, + parent_names[0], + NULL, 0, 32768, + 250000000); + if (IS_ERR(slow_rc)) return; xtal_name = of_clk_get_parent_name(np, 0); osc = kzalloc(sizeof(*osc), GFP_KERNEL); if (!osc) - return; + goto unregister_slow_rc; init.name = parent_names[1]; init.ops = &sama5d4_slow_osc_ops; @@ -597,17 +598,29 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) osc->bits = &at91sama5d4_bits; ret = clk_hw_register(NULL, &osc->hw); - if (ret) { - kfree(osc); - return; - } + if (ret) + goto free_slow_osc_data; - hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2, - &at91sama5d4_bits); - if (IS_ERR(hw)) - return; + slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", + parent_names, 2, + &at91sama5d4_bits); + if (IS_ERR(slowck)) + goto unregister_slow_osc; - of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw); + ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, slowck); + if (WARN_ON(ret)) + goto unregister_slowck; + + return; + +unregister_slowck: + at91_clk_unregister_sam9x5_slow(slowck); +unregister_slow_osc: + clk_hw_unregister(&osc->hw); +free_slow_osc_data: + kfree(osc); +unregister_slow_rc: + clk_hw_unregister(slow_rc); } CLK_OF_DECLARE(sama5d4_clk_sckc, "atmel,sama5d4-sckc", of_sama5d4_sckc_setup); -- cgit From ecbcc2aa655744363647b91dee09096918e41eaf Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 27 Jun 2019 18:53:45 +0300 Subject: clk: at91: sckc: use dedicated functions to unregister clock Use at91 specific functions to free all resources in case of error. Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Signed-off-by: Stephen Boyd --- drivers/clk/at91/sckc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/clk/at91') diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index e216bb613562..c0451c9cf334 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -509,13 +509,13 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np) return; unregister_td_slck: - clk_hw_unregister(clk_data->hws[1]); + at91_clk_unregister_sam9x5_slow(clk_data->hws[1]); unregister_md_slck: clk_hw_unregister(clk_data->hws[0]); clk_data_free: kfree(clk_data); unregister_slow_osc: - clk_hw_unregister(slow_osc); + at91_clk_unregister_slow_osc(slow_osc); unregister_slow_rc: clk_hw_unregister(slow_rc); } -- cgit