From 5b73cb5b0167833347fa0ce5525cfb488b2e2290 Mon Sep 17 00:00:00 2001 From: Matthew Gerlach Date: Thu, 23 Mar 2017 19:34:30 -0500 Subject: fpga pr ip: Platform driver for Altera Partial Reconfiguration IP. This adds a platform bus driver for a fpga-mgr driver that uses the Altera Partial Reconfiguration IP component. Signed-off-by: Matthew Gerlach Acked-by: Alan Tull Signed-off-by: Greg Kroah-Hartman --- drivers/fpga/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/fpga/Makefile') diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 968fd51cb619..530cf9410dde 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o +obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o # FPGA Bridge Drivers obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o -- cgit