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| author | Abner Chang <abner.chang@hpe.com> | 2020-04-03 13:51:12 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-05-07 03:17:15 +0000 |
| commit | e6956d0052a79dd7d45dd633d8201bce8c34bccd (patch) | |
| tree | e3590c272bbd145b1e6c22d6b5a3d3ad290c9d30 /.pytool | |
| parent | 722da9078eb03317f23d61f33f8f1f3e1dd78396 (diff) | |
| download | edk2-e6956d0052a79dd7d45dd633d8201bce8c34bccd.tar.gz | |
.pytool: Add RISC-V architecture on RISC-V EDK2 CI.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Add RISC-V architecture on RISC-V EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
Diffstat (limited to '.pytool')
| -rw-r--r-- | .pytool/CISettings.py | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py index 7a8bd33803..79aa12d9f5 100644 --- a/.pytool/CISettings.py +++ b/.pytool/CISettings.py @@ -1,6 +1,7 @@ # @file
#
# Copyright (c) Microsoft Corporation.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import os
@@ -57,10 +58,12 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag def GetArchitecturesSupported(self):
''' return iterable of edk2 architectures supported by this build '''
- return ("IA32",
+ return (
+ "IA32",
"X64",
"ARM",
- "AARCH64")
+ "AARCH64",
+ "RISCV64")
def GetTargetsSupported(self):
''' return iterable of edk2 target tags supported by this build '''
@@ -133,6 +136,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag scopes += ("gcc_aarch64_linux",)
if "ARM" in self.ActualArchitectures:
scopes += ("gcc_arm_linux",)
+ if "RISCV64" in self.ActualArchitectures:
+ scopes += ("gcc_riscv64_unknown",)
return scopes
|