diff options
| author | David Wei <david.wei@intel.com> | 2015-06-25 08:18:34 +0000 |
|---|---|---|
| committer | zwei4 <zwei4@Edk2> | 2015-06-25 08:18:34 +0000 |
| commit | 196d9c7b79b8d9d6a9a4f1de723e1952c02219c9 (patch) | |
| tree | 7acfaadacefabcbafee508669e4c4e26bd6a68ad | |
| parent | 44a9065659e40d1c94226fb9c0a55e4c245e584a (diff) | |
| download | edk2-196d9c7b79b8d9d6a9a4f1de723e1952c02219c9.tar.gz | |
Remove wakeup capability of GPIO_SUS1 and GPIO_SUS2.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2014.SP1@17712 6f19259b-4bc3-4df7-8a09-765794883524
| -rw-r--r-- | Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h b/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h index aebfafa1b9..d8cd98e688 100644 --- a/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h +++ b/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h @@ -46,33 +46,33 @@ GPIO_INIT_ITEM("PLT_CLK3 GPIOC_99 " ,TRISTS ,NA ,F0 #define MINNOW2_GPIO_USE_SEL_VAL_64_70 0x00000000
#define MINNOW2_GPIO_USE_SEL_VAL_64_70 0x00000000
#define MINNOW2_GPIO_USE_SEL_VAL_SUS 0x00000000
-#define MINNOW2_GPIO_USE_SEL_VAL_SUS2 0x00000007
+#define MINNOW2_GPIO_USE_SEL_VAL_SUS2 0x00000001
#define MINNOW2_GPIO_IO_SEL_VAL_0_31 0x00000000
#define MINNOW2_GPIO_IO_SEL_VAL_32_63 0x00000000
#define MINNOW2_GPIO_IO_SEL_VAL_64_70 0x00000000
#define MINNOW2_GPIO_IO_SEL_VAL_SUS 0x00000000
-#define MINNOW2_GPIO_IO_SEL_VAL_SUS2 0x00000007
+#define MINNOW2_GPIO_IO_SEL_VAL_SUS2 0x00000001
#define MINNOW2_GPIO_LVL_VAL_0_31 0x00000000
#define MINNOW2_GPIO_LVL_VAL_32_63 0x00000000
#define MINNOW2_GPIO_LVL_VAL_64_70 0x00000000
#define MINNOW2_GPIO_LVL_VAL_SUS 0x00000000
-#define MINNOW2_GPIO_LVL_VAL_SUS2 0x00000007
+#define MINNOW2_GPIO_LVL_VAL_SUS2 0x00000001
#define MINNOW2_GPIO_TPE_VAL_0_31 0x00000000
#define MINNOW2_GPIO_TPE_VAL_SUS 0x00000000
-#define MINNOW2_GPIO_TPE_VAL_SUS2 0x00000007
+#define MINNOW2_GPIO_TPE_VAL_SUS2 0x00000001
#define MINNOW2_GPIO_TNE_VAL_0_31 0x00000000
#define MINNOW2_GPIO_TNE_VAL_SUS 0x00000000
-#define MINNOW2_GPIO_TNE_VAL_SUS2 0x00000007
+#define MINNOW2_GPIO_TNE_VAL_SUS2 0x00000001
#define MINNOW2_GPIO_TS_VAL_0_31 0x00000000
#define MINNOW2_GPIO_TS_VAL_SUS 0x00000000
-#define MINNOW2_GPIO_TS_VAL_SUS2 0x00000007
+#define MINNOW2_GPIO_TS_VAL_SUS2 0x00000001
static CFIO_INIT_STRUCT mMinnow2CfioInitData =
{
|