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authorHao Wu <hao.a.wu@intel.com>2015-08-25 06:05:40 +0000
committerhwu1225 <hwu1225@Edk2>2015-08-25 06:05:40 +0000
commit6b5122eab775aa08d00946aea092a336885e2e58 (patch)
treebd841eb85980f88f890d6ecd1d56b685b8b5d2a3
parentc20ea4673f9f4186da8a41d780e5d52ce0380811 (diff)
downloadedk2-6b5122eab775aa08d00946aea092a336885e2e58.tar.gz
Copy head revision r18124 from main trunk.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2014.SP1@18297 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r--IntelFspPkg/Contributions.txt218
-rw-r--r--IntelFspPkg/FspDxeIpl/DxeIpl.c101
-rw-r--r--IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm16
-rw-r--r--IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s6
-rw-r--r--IntelFspPkg/FspSecCore/Ia32/FspHelper.asm34
-rw-r--r--IntelFspPkg/FspSecCore/Ia32/FspHelper.s39
-rw-r--r--IntelFspPkg/FspSecCore/SecFsp.c6
-rw-r--r--IntelFspPkg/FspSecCore/SecFsp.h4
-rw-r--r--IntelFspPkg/FspSecCore/SecMain.c2
-rw-r--r--IntelFspPkg/Include/Library/FspCommonLib.h44
-rw-r--r--IntelFspPkg/Include/Library/FspSecPlatformLib.h14
-rw-r--r--IntelFspPkg/Include/Private/FspGlobalData.h2
-rw-r--r--IntelFspPkg/Library/BaseCacheLib/CacheLib.c2
-rw-r--r--IntelFspPkg/Library/BaseFspCommonLib/FspCommonLib.c85
-rw-r--r--IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c7
-rw-r--r--IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c23
-rw-r--r--IntelFspPkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c17
-rw-r--r--IntelFspPkg/Tools/GenCfgOpt.py262
-rw-r--r--IntelFspPkg/Tools/PatchFv.py2
-rw-r--r--IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docxbin22177 -> 24424 bytes
20 files changed, 737 insertions, 147 deletions
diff --git a/IntelFspPkg/Contributions.txt b/IntelFspPkg/Contributions.txt
new file mode 100644
index 0000000000..f87cbd73c6
--- /dev/null
+++ b/IntelFspPkg/Contributions.txt
@@ -0,0 +1,218 @@
+
+======================
+= Code Contributions =
+======================
+
+To make a contribution to a TianoCore project, follow these steps.
+1. Create a change description in the format specified below to
+ use in the source control commit log.
+2. Your commit message must include your "Signed-off-by" signature,
+ and "Contributed-under" message.
+3. Your "Contributed-under" message explicitly states that the
+ contribution is made under the terms of the specified
+ contribution agreement. Your "Contributed-under" message
+ must include the name of contribution agreement and version.
+ For example: Contributed-under: TianoCore Contribution Agreement 1.0
+ The "TianoCore Contribution Agreement" is included below in
+ this document.
+4. Submit your code to the TianoCore project using the process
+ that the project documents on its web page. If the process is
+ not documented, then submit the code on development email list
+ for the project.
+5. It is preferred that contributions are submitted using the same
+ copyright license as the base project. When that is not possible,
+ then contributions using the following licenses can be accepted:
+ * BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
+ * BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
+ * MIT: http://opensource.org/licenses/MIT
+ * Python-2.0: http://opensource.org/licenses/Python-2.0
+ * Zlib: http://opensource.org/licenses/Zlib
+
+ Contributions of code put into the public domain can also be
+ accepted.
+
+ Contributions using other licenses might be accepted, but further
+ review will be required.
+
+=====================================================
+= Change Description / Commit Message / Patch Email =
+=====================================================
+
+Your change description should use the standard format for a
+commit message, and must include your "Signed-off-by" signature
+and the "Contributed-under" message.
+
+== Sample Change Description / Commit Message =
+
+=== Start of sample patch email message ===
+
+From: Contributor Name <contributor@example.com>
+Subject: [PATCH] CodeModule: Brief-single-line-summary
+
+Full-commit-message
+
+Contributed-under: TianoCore Contribution Agreement 1.0
+Signed-off-by: Contributor Name <contributor@example.com>
+---
+
+An extra message for the patch email which will not be considered part
+of the commit message can be added here.
+
+Patch content inline or attached
+
+=== End of sample patch email message ===
+
+=== Notes for sample patch email ===
+
+* The first line of commit message is taken from the email's subject
+ line following [PATCH]. The remaining portion of the commit message
+ is the email's content until the '---' line.
+* git format-patch is one way to create this format
+
+=== Definitions for sample patch email ===
+
+* "CodeModule" is a short idenfier for the affected code. For
+ example MdePkg, or MdeModulePkg UsbBusDxe.
+* "Brief-single-line-summary" is a short summary of the change.
+* The entire first line should be less than ~70 characters.
+* "Full-commit-message" a verbose multiple line comment describing
+ the change. Each line should be less than ~70 characters.
+* "Contributed-under" explicitely states that the contribution is
+ made under the terms of the contribtion agreement. This
+ agreement is included below in this document.
+* "Signed-off-by" is the contributor's signature identifying them
+ by their real/legal name and their email address.
+
+========================================
+= TianoCore Contribution Agreement 1.0 =
+========================================
+
+INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
+INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
+PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
+TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
+TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
+REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
+CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
+OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
+BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
+AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
+AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
+USE THE CONTENT.
+
+Unless otherwise indicated, all Content made available on the TianoCore
+site is provided to you under the terms and conditions of the BSD
+License ("BSD"). A copy of the BSD License is available at
+http://opensource.org/licenses/bsd-license.php
+or when applicable, in the associated License.txt file.
+
+Certain other content may be made available under other licenses as
+indicated in or with such Content. (For example, in a License.txt file.)
+
+You accept and agree to the following terms and conditions for Your
+present and future Contributions submitted to TianoCore site. Except
+for the license granted to Intel hereunder, You reserve all right,
+title, and interest in and to Your Contributions.
+
+== SECTION 1: Definitions ==
+* "You" or "Contributor" shall mean the copyright owner or legal
+ entity authorized by the copyright owner that is making a
+ Contribution hereunder. All other entities that control, are
+ controlled by, or are under common control with that entity are
+ considered to be a single Contributor. For the purposes of this
+ definition, "control" means (i) the power, direct or indirect, to
+ cause the direction or management of such entity, whether by
+ contract or otherwise, or (ii) ownership of fifty percent (50%)
+ or more of the outstanding shares, or (iii) beneficial ownership
+ of such entity.
+* "Contribution" shall mean any original work of authorship,
+ including any modifications or additions to an existing work,
+ that is intentionally submitted by You to the TinaoCore site for
+ inclusion in, or documentation of, any of the Content. For the
+ purposes of this definition, "submitted" means any form of
+ electronic, verbal, or written communication sent to the
+ TianoCore site or its representatives, including but not limited
+ to communication on electronic mailing lists, source code
+ control systems, and issue tracking systems that are managed by,
+ or on behalf of, the TianoCore site for the purpose of
+ discussing and improving the Content, but excluding
+ communication that is conspicuously marked or otherwise
+ designated in writing by You as "Not a Contribution."
+
+== SECTION 2: License for Contributions ==
+* Contributor hereby agrees that redistribution and use of the
+ Contribution in source and binary forms, with or without
+ modification, are permitted provided that the following
+ conditions are met:
+** Redistributions of source code must retain the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer.
+** Redistributions in binary form must reproduce the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials provided
+ with the distribution.
+* Disclaimer. None of the names of Contributor, Intel, or the names
+ of their respective contributors may be used to endorse or
+ promote products derived from this software without specific
+ prior written permission.
+* Contributor grants a license (with the right to sublicense) under
+ claims of Contributor's patents that Contributor can license that
+ are infringed by the Contribution (as delivered by Contributor) to
+ make, use, distribute, sell, offer for sale, and import the
+ Contribution and derivative works thereof solely to the minimum
+ extent necessary for licensee to exercise the granted copyright
+ license; this patent license applies solely to those portions of
+ the Contribution that are unmodified. No hardware per se is
+ licensed.
+* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
+ CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
+ CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ DAMAGE.
+
+== SECTION 3: Representations ==
+* You represent that You are legally entitled to grant the above
+ license. If your employer(s) has rights to intellectual property
+ that You create that includes Your Contributions, You represent
+ that You have received permission to make Contributions on behalf
+ of that employer, that Your employer has waived such rights for
+ Your Contributions.
+* You represent that each of Your Contributions is Your original
+ creation (see Section 4 for submissions on behalf of others).
+ You represent that Your Contribution submissions include complete
+ details of any third-party license or other restriction
+ (including, but not limited to, related patents and trademarks)
+ of which You are personally aware and which are associated with
+ any part of Your Contributions.
+
+== SECTION 4: Third Party Contributions ==
+* Should You wish to submit work that is not Your original creation,
+ You may submit it to TianoCore site separately from any
+ Contribution, identifying the complete details of its source
+ and of any license or other restriction (including, but not
+ limited to, related patents, trademarks, and license agreements)
+ of which You are personally aware, and conspicuously marking the
+ work as "Submitted on behalf of a third-party: [named here]".
+
+== SECTION 5: Miscellaneous ==
+* Applicable Laws. Any claims arising under or relating to this
+ Agreement shall be governed by the internal substantive laws of
+ the State of Delaware or federal courts located in Delaware,
+ without regard to principles of conflict of laws.
+* Language. This Agreement is in the English language only, which
+ language shall be controlling in all respects, and all versions
+ of this Agreement in any other language shall be for accommodation
+ only and shall not be binding. All communications and notices made
+ or given pursuant to this Agreement, and all documentation and
+ support to be provided, unless otherwise noted, shall be in the
+ English language.
+
diff --git a/IntelFspPkg/FspDxeIpl/DxeIpl.c b/IntelFspPkg/FspDxeIpl/DxeIpl.c
index f6e1116f57..9ccd3ca94b 100644
--- a/IntelFspPkg/FspDxeIpl/DxeIpl.c
+++ b/IntelFspPkg/FspDxeIpl/DxeIpl.c
@@ -301,67 +301,58 @@ Decompress (
//
switch (CompressionType) {
case EFI_STANDARD_COMPRESSION:
- if (TRUE) {
- //
- // Load EFI standard compression.
- // For compressed data, decompress them to destination buffer.
- //
- Status = UefiDecompressGetInfo (
- CompressionSource,
- CompressionSourceSize,
- &DstBufferSize,
- &ScratchBufferSize
- );
- if (EFI_ERROR (Status)) {
- //
- // GetInfo failed
- //
- DEBUG ((DEBUG_ERROR, "Decompress GetInfo Failed - %r\n", Status));
- return EFI_NOT_FOUND;
- }
- //
- // Allocate scratch buffer
- //
- ScratchBuffer = AllocatePages (EFI_SIZE_TO_PAGES (ScratchBufferSize));
- if (ScratchBuffer == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- //
- // Allocate destination buffer, extra one page for adjustment
- //
- DstBuffer = AllocatePages (EFI_SIZE_TO_PAGES (DstBufferSize) + 1);
- if (DstBuffer == NULL) {
- return EFI_OUT_OF_RESOURCES;
- }
- //
- // DstBuffer still is one section. Adjust DstBuffer offset, skip EFI section header
- // to make section data at page alignment.
- //
- DstBuffer = DstBuffer + EFI_PAGE_SIZE - sizeof (EFI_COMMON_SECTION_HEADER);
+ //
+ // Load EFI standard compression.
+ // For compressed data, decompress them to destination buffer.
+ //
+ Status = UefiDecompressGetInfo (
+ CompressionSource,
+ CompressionSourceSize,
+ &DstBufferSize,
+ &ScratchBufferSize
+ );
+ if (EFI_ERROR (Status)) {
//
- // Call decompress function
+ // GetInfo failed
//
- Status = UefiDecompress (
- CompressionSource,
- DstBuffer,
- ScratchBuffer
- );
- if (EFI_ERROR (Status)) {
- //
- // Decompress failed
- //
- DEBUG ((DEBUG_ERROR, "Decompress Failed - %r\n", Status));
- return EFI_NOT_FOUND;
- }
- break;
- } else {
+ DEBUG ((DEBUG_ERROR, "Decompress GetInfo Failed - %r\n", Status));
+ return EFI_NOT_FOUND;
+ }
+ //
+ // Allocate scratch buffer
+ //
+ ScratchBuffer = AllocatePages (EFI_SIZE_TO_PAGES (ScratchBufferSize));
+ if (ScratchBuffer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ //
+ // Allocate destination buffer, extra one page for adjustment
+ //
+ DstBuffer = AllocatePages (EFI_SIZE_TO_PAGES (DstBufferSize) + 1);
+ if (DstBuffer == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ //
+ // DstBuffer still is one section. Adjust DstBuffer offset, skip EFI section header
+ // to make section data at page alignment.
+ //
+ DstBuffer = DstBuffer + EFI_PAGE_SIZE - sizeof (EFI_COMMON_SECTION_HEADER);
+ //
+ // Call decompress function
+ //
+ Status = UefiDecompress (
+ CompressionSource,
+ DstBuffer,
+ ScratchBuffer
+ );
+ if (EFI_ERROR (Status)) {
//
- // PcdDxeIplSupportUefiDecompress is FALSE
- // Don't support UEFI decompression algorithm.
+ // Decompress failed
//
- ASSERT (FALSE);
+ DEBUG ((DEBUG_ERROR, "Decompress Failed - %r\n", Status));
return EFI_NOT_FOUND;
}
+ break;
case EFI_NOT_COMPRESSED:
//
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
index a0c9b1ed73..71e3e5a1e2 100644
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
@@ -143,8 +143,8 @@ check_main_header:
mov ecx, MSR_IA32_PLATFORM_ID
rdmsr
mov ecx, edx
- shr ecx, 50-32
- and ecx, 7h
+ shr ecx, 50-32 ; shift (50d-32d=18d=0x12) bits
+ and ecx, 7h ; platform id at bit[52..50]
mov edx, 1
shl edx, cl
@@ -368,15 +368,15 @@ TempRamInitApi PROC NEAR PUBLIC
mov eax, dword ptr [esp + 4]
cmp eax, 0
mov eax, 80000002h
- jz NemInitExit
+ jz TempRamInitExit
;
; Sec Platform Init
;
CALL_MMX SecPlatformInit
cmp eax, 0
- jnz NemInitExit
-
+ jnz TempRamInitExit
+
; Load microcode
LOAD_ESP
CALL_MMX LoadMicrocode
@@ -387,14 +387,14 @@ TempRamInitApi PROC NEAR PUBLIC
LOAD_ESP
CALL_MMX SecCarInit
cmp eax, 0
- jnz NemInitExit
+ jnz TempRamInitExit
LOAD_ESP
CALL_MMX EstablishStackFsp
LXMMN xmm6, eax, 3 ;Restore microcode status if no CAR init error from ECX-SLOT 3 in xmm6.
-NemInitExit:
+TempRamInitExit:
;
; Load EBP, EBX, ESI, EDI & ESP from XMM7 & XMM6
;
@@ -569,7 +569,7 @@ FspApiCommon PROC C PUBLIC
;
; Pass BFV into the PEI Core
; It uses relative address to calucate the actual boot FV base
- ; For FSP impleantion with single FV, PcdFlashFvRecoveryBase and
+ ; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and
; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
; they are different. The code below can handle both cases.
;
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
index 8f4093ca19..d9cfcc3390 100644
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
@@ -297,8 +297,8 @@ CheckMainHeader:
movl $MSR_IA32_PLATFORM_ID, %ecx
rdmsr
movl %edx, %ecx
- shrl $0x12, %ecx #($50-$32)
- andl $0x07, %ecx
+ shrl $0x12, %ecx # shift (50d-32d=18d=0x12) bits
+ andl $0x07, %ecx # platform id at bit[52..50]
movl $0x01, %edx
shll %cl,%edx
@@ -784,7 +784,7 @@ FspApiCommonL2:
#
# Pass BFV into the PEI Core
# It uses relative address to calucate the actual boot FV base
- # For FSP impleantion with single FV, PcdFlashFvRecoveryBase and
+ # For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and
# PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
# they are different. The code below can handle both cases.
#
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm b/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm
index 8efea01aae..b991386c77 100644
--- a/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspHelper.asm
@@ -15,6 +15,10 @@
.model flat,C
.code
+;
+; FspInfoHeaderRelativeOff is patched during build process and initialized to offset of the AsmGetFspBaseAddress
+; from the FSP Info header.
+;
FspInfoHeaderRelativeOff PROC NEAR PUBLIC
;
; This value will be pached by the build script
@@ -22,6 +26,11 @@ FspInfoHeaderRelativeOff PROC NEAR PUBLIC
DD 012345678h
FspInfoHeaderRelativeOff ENDP
+;
+; Returns FSP Base Address.
+;
+; This function gets the FSP Info Header using relative addressing and returns the FSP Base from the header structure
+;
AsmGetFspBaseAddress PROC NEAR PUBLIC
mov eax, AsmGetFspBaseAddress
sub eax, dword ptr [FspInfoHeaderRelativeOff]
@@ -30,10 +39,35 @@ AsmGetFspBaseAddress PROC NEAR PUBLIC
ret
AsmGetFspBaseAddress ENDP
+;
+; No stack counter part of AsmGetFspBaseAddress. Return address is in edi.
+;
+AsmGetFspBaseAddressNoStack PROC NEAR PUBLIC
+ mov eax, AsmGetFspBaseAddress
+ sub eax, dword ptr [FspInfoHeaderRelativeOff]
+ add eax, 01Ch
+ mov eax, dword ptr [eax]
+ jmp edi
+AsmGetFspBaseAddressNoStack ENDP
+
+;
+; Returns FSP Info Header.
+;
+; This function gets the FSP Info Header using relative addressing and returns it
+;
AsmGetFspInfoHeader PROC NEAR PUBLIC
mov eax, AsmGetFspBaseAddress
sub eax, dword ptr [FspInfoHeaderRelativeOff]
ret
AsmGetFspInfoHeader ENDP
+;
+; No stack counter part of AsmGetFspInfoHeader. Return address is in edi.
+;
+AsmGetFspInfoHeaderNoStack PROC NEAR PUBLIC
+ mov eax, AsmGetFspBaseAddress
+ sub eax, dword ptr [FspInfoHeaderRelativeOff]
+ jmp edi
+AsmGetFspInfoHeaderNoStack ENDP
+
END \ No newline at end of file
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspHelper.s b/IntelFspPkg/FspSecCore/Ia32/FspHelper.s
index a6cf36259d..55d8ae75c0 100644
--- a/IntelFspPkg/FspSecCore/Ia32/FspHelper.s
+++ b/IntelFspPkg/FspSecCore/Ia32/FspHelper.s
@@ -15,6 +15,10 @@
#
#------------------------------------------------------------------------------
+#
+# FspInfoHeaderRelativeOff is patched during build process and initialized to offset of the AsmGetFspBaseAddress
+# from the FSP Info header.
+#
ASM_GLOBAL ASM_PFX(FspInfoHeaderRelativeOff)
ASM_PFX(FspInfoHeaderRelativeOff):
#
@@ -22,17 +26,46 @@ ASM_PFX(FspInfoHeaderRelativeOff):
#
.long 0x012345678
-
+#
+# Returns FSP Base Address.
+#
+# This function gets the FSP Info Header using relative addressing and returns the FSP Base from the header structure
+#
ASM_GLOBAL ASM_PFX(AsmGetFspBaseAddress)
ASM_PFX(AsmGetFspBaseAddress):
mov $AsmGetFspBaseAddress, %eax
- sub $FspInfoHeaderRelativeOff, %eax
+ sub FspInfoHeaderRelativeOff, %eax
add $0x01C, %eax
mov (%eax), %eax
ret
+#
+# No stack counter part of AsmGetFspBaseAddress. Return address is in edi.
+#
+ASM_GLOBAL ASM_PFX(AsmGetFspBaseAddressNoStack)
+ASM_PFX(AsmGetFspBaseAddressNoStack):
+ mov $AsmGetFspBaseAddress, %eax
+ sub FspInfoHeaderRelativeOff, %eax
+ add $0x01C, %eax
+ mov (%eax), %eax
+ jmp *%edi
+
+#
+# Returns FSP Info Header.
+#
+# This function gets the FSP Info Header using relative addressing and returns it
+#
ASM_GLOBAL ASM_PFX(AsmGetFspInfoHeader)
ASM_PFX(AsmGetFspInfoHeader):
mov $AsmGetFspBaseAddress, %eax
- sub $FspInfoHeaderRelativeOff, %eax
+ sub FspInfoHeaderRelativeOff, %eax
ret
+
+#
+# No stack counter part of AsmGetFspInfoHeader. Return address is in edi.
+#
+ASM_GLOBAL ASM_PFX(AsmGetFspInfoHeaderNoStack)
+ASM_PFX(AsmGetFspInfoHeaderNoStack):
+ mov $AsmGetFspBaseAddress, %eax
+ sub FspInfoHeaderRelativeOff, %eax
+ jmp *%edi
diff --git a/IntelFspPkg/FspSecCore/SecFsp.c b/IntelFspPkg/FspSecCore/SecFsp.c
index a9aba7108e..07aed1c1c0 100644
--- a/IntelFspPkg/FspSecCore/SecFsp.c
+++ b/IntelFspPkg/FspSecCore/SecFsp.c
@@ -265,7 +265,7 @@ FspApiCallingCheck (
//
if ((UINT32)FspData != 0xFFFFFFFF) {
Status = EFI_UNSUPPORTED;
- } else if ((FspRtBuffer == NULL) || ((FspRtBuffer->BootLoaderTolumSize % EFI_PAGE_SIZE) != 0)) {
+ } else if ((FspRtBuffer == NULL) || ((FspRtBuffer->BootLoaderTolumSize % EFI_PAGE_SIZE) != 0) || (EFI_ERROR(FspUpdSignatureCheck(ApiIdx, ApiParam)))) {
Status = EFI_INVALID_PARAMETER;
}
} else if (ApiIdx == 2) {
@@ -285,7 +285,7 @@ FspApiCallingCheck (
//
if ((UINT32)FspData != 0xFFFFFFFF) {
Status = EFI_UNSUPPORTED;
- } else if ((FspRtBuffer == NULL) || ((FspRtBuffer->BootLoaderTolumSize % EFI_PAGE_SIZE) != 0)) {
+ } else if ((FspRtBuffer == NULL) || ((FspRtBuffer->BootLoaderTolumSize % EFI_PAGE_SIZE) != 0) || (EFI_ERROR(FspUpdSignatureCheck(ApiIdx, ApiParam)))) {
Status = EFI_INVALID_PARAMETER;
}
} else if (ApiIdx == 4) {
@@ -308,6 +308,8 @@ FspApiCallingCheck (
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
Status = EFI_UNSUPPORTED;
+ } else if (EFI_ERROR(FspUpdSignatureCheck(ApiIdx, ApiParam))) {
+ Status = EFI_INVALID_PARAMETER;
}
}
} else {
diff --git a/IntelFspPkg/FspSecCore/SecFsp.h b/IntelFspPkg/FspSecCore/SecFsp.h
index 3e4e2a4b5c..4dceebc31b 100644
--- a/IntelFspPkg/FspSecCore/SecFsp.h
+++ b/IntelFspPkg/FspSecCore/SecFsp.h
@@ -15,14 +15,14 @@
#define _SEC_FSPE_H_
#include <PiPei.h>
+#include <FspApi.h>
#include <Library/PcdLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/SerialPortLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/FspCommonLib.h>
-
-#include <FspApi.h>
+#include <Library/FspSecPlatformLib.h>
#define FSP_MCUD_SIGNATURE SIGNATURE_32 ('M', 'C', 'U', 'D')
#define FSP_PER0_SIGNATURE SIGNATURE_32 ('P', 'E', 'R', '0')
diff --git a/IntelFspPkg/FspSecCore/SecMain.c b/IntelFspPkg/FspSecCore/SecMain.c
index 63376e9b6e..99acefaefa 100644
--- a/IntelFspPkg/FspSecCore/SecMain.c
+++ b/IntelFspPkg/FspSecCore/SecMain.c
@@ -104,7 +104,7 @@ SecStartup (
AsmWriteIdtr (&IdtDescriptor);
//
- // Iniitalize the global FSP data region
+ // Initialize the global FSP data region
//
FspGlobalDataInit (&PeiFspData, BootLoaderStack, (UINT8)ApiIdx);
diff --git a/IntelFspPkg/Include/Library/FspCommonLib.h b/IntelFspPkg/Include/Library/FspCommonLib.h
index eddebba1ea..fa2f81c088 100644
--- a/IntelFspPkg/Include/Library/FspCommonLib.h
+++ b/IntelFspPkg/Include/Library/FspCommonLib.h
@@ -158,6 +158,50 @@ GetFspUpdDataPointer (
);
/**
+ This function sets the memory init UPD data pointer.
+
+ @param[in] MemoryInitUpdPtr memory init UPD data pointer.
+**/
+VOID
+EFIAPI
+SetFspMemoryInitUpdDataPointer (
+ IN VOID *MemoryInitUpdPtr
+ );
+
+/**
+ This function gets the memory init UPD data pointer.
+
+ @return memory init UPD data pointer.
+**/
+VOID *
+EFIAPI
+GetFspMemoryInitUpdDataPointer (
+ VOID
+ );
+
+/**
+ This function sets the silicon init UPD data pointer.
+
+ @param[in] SiliconInitUpdPtr silicon init UPD data pointer.
+**/
+VOID
+EFIAPI
+SetFspSiliconInitUpdDataPointer (
+ IN VOID *SiliconInitUpdPtr
+ );
+
+/**
+ This function gets the silicon init UPD data pointer.
+
+ @return silicon init UPD data pointer.
+**/
+VOID *
+EFIAPI
+GetFspSiliconInitUpdDataPointer (
+ VOID
+ );
+
+/**
Set FSP measurement point timestamp.
@param[in] Id Measurement point ID.
diff --git a/IntelFspPkg/Include/Library/FspSecPlatformLib.h b/IntelFspPkg/Include/Library/FspSecPlatformLib.h
index c6ed43001d..d5c7e77930 100644
--- a/IntelFspPkg/Include/Library/FspSecPlatformLib.h
+++ b/IntelFspPkg/Include/Library/FspSecPlatformLib.h
@@ -71,4 +71,18 @@ SecCarInit (
IN FSP_TEMP_RAM_INIT_PARAMS *TempRamInitParamPtr
);
+/**
+ This function check the signture of UPD.
+
+ @param[in] ApiIdx Internal index of the FSP API.
+ @param[in] ApiParam Parameter of the FSP API.
+
+**/
+EFI_STATUS
+EFIAPI
+FspUpdSignatureCheck (
+ IN UINT32 ApiIdx,
+ IN VOID *ApiParam
+ );
+
#endif
diff --git a/IntelFspPkg/Include/Private/FspGlobalData.h b/IntelFspPkg/Include/Private/FspGlobalData.h
index f50255fa7f..be33e89c17 100644
--- a/IntelFspPkg/Include/Private/FspGlobalData.h
+++ b/IntelFspPkg/Include/Private/FspGlobalData.h
@@ -34,6 +34,8 @@ typedef struct {
FSP_PLAT_DATA PlatformData;
FSP_INFO_HEADER *FspInfoHeader;
VOID *UpdDataRgnPtr;
+ VOID *MemoryInitUpdPtr;
+ VOID *SiliconInitUpdPtr;
UINT8 ApiMode;
UINT8 Reserved[3];
UINT32 PerfIdx;
diff --git a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
index 1a08918597..b38dce32a8 100644
--- a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
+++ b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
@@ -45,7 +45,7 @@ SearchForExactMtrr (
@param[in] MemoryCacheType input cache type to be checked.
@retval TRUE MemoryCacheType is default MTRR setting.
- @retval TRUE MemoryCacheType is NOT default MTRR setting.
+ @retval FALSE MemoryCacheType is NOT default MTRR setting.
**/
BOOLEAN
IsDefaultType (
diff --git a/IntelFspPkg/Library/BaseFspCommonLib/FspCommonLib.c b/IntelFspPkg/Library/BaseFspCommonLib/FspCommonLib.c
index 7de84a0a7e..a31d16bb70 100644
--- a/IntelFspPkg/Library/BaseFspCommonLib/FspCommonLib.c
+++ b/IntelFspPkg/Library/BaseFspCommonLib/FspCommonLib.c
@@ -289,6 +289,91 @@ GetFspUpdDataPointer (
return FspData->UpdDataRgnPtr;
}
+
+/**
+ This function sets the memory init UPD data pointer.
+
+ @param[in] MemoryInitUpdPtr memory init UPD data pointer.
+**/
+VOID
+EFIAPI
+SetFspMemoryInitUpdDataPointer (
+ IN VOID *MemoryInitUpdPtr
+ )
+{
+ FSP_GLOBAL_DATA *FspData;
+
+ //
+ // Get the Fsp Global Data Pointer
+ //
+ FspData = GetFspGlobalDataPointer ();
+
+ //
+ // Set the memory init UPD pointer.
+ //
+ FspData->MemoryInitUpdPtr = MemoryInitUpdPtr;
+}
+
+/**
+ This function gets the memory init UPD data pointer.
+
+ @return memory init UPD data pointer.
+**/
+VOID *
+EFIAPI
+GetFspMemoryInitUpdDataPointer (
+ VOID
+ )
+{
+ FSP_GLOBAL_DATA *FspData;
+
+ FspData = GetFspGlobalDataPointer ();
+ return FspData->MemoryInitUpdPtr;
+}
+
+
+/**
+ This function sets the silicon init UPD data pointer.
+
+ @param[in] SiliconInitUpdPtr silicon init UPD data pointer.
+**/
+VOID
+EFIAPI
+SetFspSiliconInitUpdDataPointer (
+ IN VOID *SiliconInitUpdPtr
+ )
+{
+ FSP_GLOBAL_DATA *FspData;
+
+ //
+ // Get the Fsp Global Data Pointer
+ //
+ FspData = GetFspGlobalDataPointer ();
+
+ //
+ // Set the silicon init UPD data pointer.
+ //
+ FspData->SiliconInitUpdPtr = SiliconInitUpdPtr;
+}
+
+/**
+ This function gets the silicon init UPD data pointer.
+
+ @return silicon init UPD data pointer.
+**/
+VOID *
+EFIAPI
+GetFspSiliconInitUpdDataPointer (
+ VOID
+ )
+{
+ FSP_GLOBAL_DATA *FspData;
+
+ FspData = GetFspGlobalDataPointer ();
+ return FspData->SiliconInitUpdPtr;
+}
+
+
/**
Set FSP measurement point timestamp.
diff --git a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
index 8d90a1a598..73bb08e357 100644
--- a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
+++ b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
@@ -148,7 +148,12 @@ DebugAssertInternal (
//
// Generate the ASSERT() message in Ascii format
//
- AsciiStrnCpy (Buffer, "-> EBP:0x00000000 EIP:0x00000000\n", sizeof(Buffer));
+ AsciiStrnCpyS (
+ Buffer,
+ sizeof(Buffer) / sizeof(CHAR8),
+ "-> EBP:0x00000000 EIP:0x00000000\n",
+ sizeof(Buffer) / sizeof(CHAR8) - 1
+ );
SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
while (Frame != NULL) {
FillHex ((UINT32)Frame, Buffer + 9);
diff --git a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
index 97cae9ad9d..ed5db933f1 100644
--- a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
+++ b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
@@ -86,7 +86,9 @@ FspMigrateTemporaryMemory (
FSP_INIT_PARAMS *FspInitParams;
UINT32 *NewStackTop;
VOID *BootLoaderTempRamHob;
- VOID *UpdDataRgnPtr;
+ UINT32 UpdDataRgnPtr;
+ UINT32 MemoryInitUpdPtr;
+ UINT32 SiliconInitUpdPtr;
VOID *PlatformDataPtr;
UINT8 ApiMode;
@@ -105,7 +107,7 @@ FspMigrateTemporaryMemory (
if (ApiMode == 0) {
BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTemporaryMemoryGuid, BootLoaderTempRamSize);
} else {
- BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);
+ BootLoaderTempRamHob = (VOID *)AllocatePages (EFI_SIZE_TO_PAGES (BootLoaderTempRamSize));
}
ASSERT(BootLoaderTempRamHob != NULL);
@@ -150,9 +152,20 @@ FspMigrateTemporaryMemory (
//
// Update UPD pointer in FSP Global Data
//
- UpdDataRgnPtr = ((FSP_INIT_RT_COMMON_BUFFER *)FspInitParams->RtBufferPtr)->UpdDataRgnPtr;
- if (UpdDataRgnPtr != NULL) {
- SetFspUpdDataPointer (UpdDataRgnPtr);
+ if (ApiMode == 0) {
+ UpdDataRgnPtr = (UINT32)((UINT32 *)GetFspUpdDataPointer ());
+ if (UpdDataRgnPtr >= BootLoaderTempRamStart && UpdDataRgnPtr < BootLoaderTempRamEnd) {
+ MemoryInitUpdPtr = (UINT32)((UINT32 *)GetFspMemoryInitUpdDataPointer ());
+ SiliconInitUpdPtr = (UINT32)((UINT32 *)GetFspSiliconInitUpdDataPointer ());
+ SetFspUpdDataPointer ((VOID *)(UpdDataRgnPtr + OffsetGap));
+ SetFspMemoryInitUpdDataPointer ((VOID *)(MemoryInitUpdPtr + OffsetGap));
+ SetFspSiliconInitUpdDataPointer ((VOID *)(SiliconInitUpdPtr + OffsetGap));
+ }
+ } else {
+ MemoryInitUpdPtr = (UINT32)((UINT32 *)GetFspMemoryInitUpdDataPointer ());
+ if (MemoryInitUpdPtr >= BootLoaderTempRamStart && MemoryInitUpdPtr < BootLoaderTempRamEnd) {
+ SetFspMemoryInitUpdDataPointer ((VOID *)(MemoryInitUpdPtr + OffsetGap));
+ }
}
//
diff --git a/IntelFspPkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c b/IntelFspPkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c
index 4de2a1d755..d72d05f2e2 100644
--- a/IntelFspPkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c
+++ b/IntelFspPkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c
@@ -14,4 +14,21 @@
#include <PiPei.h>
+/**
+ This function check the signture of UPD.
+
+ @param[in] ApiIdx Internal index of the FSP API.
+ @param[in] ApiParam Parameter of the FSP API.
+
+**/
+EFI_STATUS
+EFIAPI
+FspUpdSignatureCheck (
+ IN UINT32 ApiIdx,
+ IN VOID *ApiParam
+ )
+{
+ return EFI_SUCCESS;
+}
+
diff --git a/IntelFspPkg/Tools/GenCfgOpt.py b/IntelFspPkg/Tools/GenCfgOpt.py
index caeb175b5b..a38da70212 100644
--- a/IntelFspPkg/Tools/GenCfgOpt.py
+++ b/IntelFspPkg/Tools/GenCfgOpt.py
@@ -88,6 +88,48 @@ are permitted provided that the following conditions are met:
**/
"""
+def UpdateMemSiUpdInitOffsetValue (DscFile):
+ DscFd = open(DscFile, "r")
+ DscLines = DscFd.readlines()
+ DscFd.close()
+
+ DscContent = []
+ MemUpdInitOffset = 0
+ SiUpdInitOffset = 0
+ MemUpdInitOffsetValue = 0
+ SiUpdInitOffsetValue = 0
+
+ while len(DscLines):
+ DscLine = DscLines.pop(0)
+ DscContent.append(DscLine)
+ DscLine = DscLine.strip()
+ Match = re.match("^([_a-zA-Z0-9]+).(MemoryInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ MemUpdInitOffsetValue = int(Match.group(5), 0)
+ Match = re.match("^\s*([_a-zA-Z0-9]+).(SiliconInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ SiUpdInitOffsetValue = int(Match.group(5), 0)
+ Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(0x244450554D454D24)",DscLine)
+ if Match:
+ MemUpdInitOffset = int(Match.group(3), 0)
+ Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(0x244450555F495324)",DscLine)
+ if Match:
+ SiUpdInitOffset = int(Match.group(3), 0)
+
+ if MemUpdInitOffsetValue != MemUpdInitOffset or SiUpdInitOffsetValue != SiUpdInitOffset:
+ MemUpdInitOffsetStr = "0x%08X" % MemUpdInitOffset
+ SiUpdInitOffsetStr = "0x%08X" % SiUpdInitOffset
+ DscFd = open(DscFile,"w")
+ for DscLine in DscContent:
+ Match = re.match("^\s*([_a-zA-Z0-9]+).(MemoryInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ DscLine = re.sub(r'(?:[^\s]+\s*$)', MemUpdInitOffsetStr + '\n', DscLine)
+ Match = re.match("^\s*([_a-zA-Z0-9]+).(SiliconInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ DscLine = re.sub(r'(?:[^\s]+\s*$)', SiUpdInitOffsetStr + '\n', line)
+ DscFd.writelines(DscLine)
+ DscFd.close()
+
class CLogicalExpression:
def __init__(self):
self.index = 0
@@ -305,7 +347,7 @@ EndList
"""
self._BsfKeyList = ['FIND','NAME','HELP','TYPE','PAGE','OPTION','ORDER']
- self._HdrKeyList = ['HEADER','STRUCT']
+ self._HdrKeyList = ['HEADER','STRUCT', 'EMBED']
self._BuidinOption = {'$EN_DIS' : 'EN_DIS'}
self._MacroDict = {}
@@ -425,7 +467,7 @@ EndList
DscFd.close()
while len(DscLines):
- DscLine = DscLines.pop(0).strip()
+ DscLine = DscLines.pop(0).strip()
Handle = False
Match = re.match("^\[(.+)\]", DscLine)
if Match is not None:
@@ -442,6 +484,7 @@ EndList
ConfigDict['name'] = ''
ConfigDict['find'] = ''
ConfigDict['struct'] = ''
+ ConfigDict['embed'] = ''
ConfigDict['subreg'] = []
IsDefSect = False
IsVpdSect = True
@@ -455,6 +498,7 @@ EndList
ConfigDict['name'] = ''
ConfigDict['find'] = ''
ConfigDict['struct'] = ''
+ ConfigDict['embed'] = ''
ConfigDict['subreg'] = []
IsDefSect = False
IsUpdSect = True
@@ -527,7 +571,6 @@ EndList
if DscLine.startswith('!'):
print("ERROR: Unrecoginized directive for line '%s'" % DscLine)
raise SystemExit
-
if not Handle:
continue
@@ -560,7 +603,7 @@ EndList
for Key in self._BsfKeyList:
Match = re.match("(?:^|.+\s+)%s:{(.+?)}" % Key, Remaining)
if Match:
- if Key in ['HELP', 'OPTION'] and Match.group(1).startswith('+'):
+ if Key in ['NAME', 'HELP', 'OPTION'] and Match.group(1).startswith('+'):
ConfigDict[Key.lower()] += Match.group(1)[1:]
else:
ConfigDict[Key.lower()] = Match.group(1)
@@ -572,7 +615,7 @@ EndList
# Check VPD/UPD
if IsUpdSect:
- Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]{4})\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
else:
Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)(?:\s*\|\s*(.+))?", DscLine)
if Match:
@@ -613,6 +656,7 @@ EndList
if ConfigDict['name'] == '':
# Clear BSF specific items
+ ConfigDict['bsfname'] = ''
ConfigDict['help'] = ''
ConfigDict['type'] = ''
ConfigDict['option'] = ''
@@ -621,6 +665,7 @@ EndList
ConfigDict['name'] = ''
ConfigDict['find'] = ''
ConfigDict['struct'] = ''
+ ConfigDict['embed'] = ''
ConfigDict['order'] = -1
ConfigDict['subreg'] = []
else:
@@ -774,9 +819,10 @@ EndList
TxtFd.close()
return 0
- def CreateField (self, Item, Name, Length, Offset, Struct, Help):
+ def CreateField (self, Item, Name, Length, Offset, Struct, BsfName, Help):
PosName = 28
PosComment = 30
+ NameLine=''
HelpLine=''
IsArray = False
@@ -786,7 +832,7 @@ EndList
IsArray = True
Type = "UINT8"
- if Item['value'].startswith('{'):
+ if Item and Item['value'].startswith('{'):
Type = "UINT8"
IsArray = True
@@ -807,24 +853,63 @@ EndList
else:
Space1 = 1
- if len(Name) < PosComment:
- Space2 = PosComment - len(Name)
- else:
- Space2 = 1
- if Help != '':
- HelpLine=" %s \n" % Help
+ if BsfName != '':
+ NameLine=" %s\n" % BsfName
- return "/**Offset 0x%04X \n%s**/\n %s%s%s;%s\n" % (Offset, HelpLine, Type, ' ' * Space1, Name, ' ' * Space2)
+ if Help != '':
+ HelpLine=" %s\n" % Help
+ if Offset is None:
+ OffsetStr = '????'
+ else:
+ OffsetStr = '0x%04X' % Offset
+
+ return "/** Offset %s\n%s%s**/\n %s%s%s;\n" % (OffsetStr, NameLine, HelpLine, Type, ' ' * Space1, Name,)
+
+ def PostProcessBody (self, TextBody):
+ NewTextBody = []
+ OldTextBody = []
+ IncludeLine = False
+ StructName = ''
+ VariableName = ''
+ for Line in TextBody:
+ Match = re.match("^/\*\sEMBED_STRUCT:(\w+):(\w+):(START|END)\s\*/\s([\s\S]*)", Line)
+ if Match:
+ Line = Match.group(4)
+
+ if Match and Match.group(3) == 'START':
+ NewTextBody.append ('typedef struct {\n')
+ StructName = Match.group(1)
+ VariableName = Match.group(2)
+ MatchOffset = re.search('/\*\*\sOffset\s0x([a-fA-F0-9]+)', Line)
+ if MatchOffset:
+ Offset = int(MatchOffset.group(1), 16)
+ else:
+ Offset = None
+ Line
+ IncludeLine = True
+ OldTextBody.append (self.CreateField (None, VariableName, 0, Offset, StructName, '', ''))
+ if IncludeLine:
+ NewTextBody.append (Line)
+ else:
+ OldTextBody.append (Line)
+
+ if Match and Match.group(3) == 'END':
+ if (StructName != Match.group(1)) or (VariableName != Match.group(2)):
+ print "Unmatched struct name '%s' and '%s' !" % (StructName, Match.group(1))
+ else:
+ NewTextBody.append ('} %s;\n\n' % StructName)
+ IncludeLine = False
+ NewTextBody.extend(OldTextBody)
+ return NewTextBody
def CreateHeaderFile (self, InputHeaderFile, IsInternal):
- Error = 0
FvDir = self._FvDir
if IsInternal:
- HeaderFile = os.path.join(FvDir, 'VpdHeader.h')
+ HeaderFile = os.path.join(FvDir, 'FspUpdVpdInternal.h')
else:
- HeaderFile = os.path.join(FvDir, 'fsp_vpd.h')
+ HeaderFile = os.path.join(FvDir, 'FspUpdVpd.h')
# Check if header needs to be recreated
ReCreate = False
@@ -845,36 +930,22 @@ EndList
self.Error = "No DSC or input header file is changed, skip the header file generating"
return 256
- HeaderFd = open(HeaderFile, "w")
- FileBase = os.path.basename(HeaderFile)
- FileName = FileBase.replace(".", "_").upper()
- HeaderFd.write("%s\n" % (__copyright_h__ % date.today().year))
- HeaderFd.write("#ifndef __%s__\n" % FileName)
- HeaderFd.write("#define __%s__\n\n" % FileName)
- HeaderFd.write("#pragma pack(1)\n\n")
-
- if InputHeaderFile != '':
- if not os.path.exists(InputHeaderFile):
- self.Error = "Input header file '%s' does not exist" % InputHeaderFile
- return 2
-
- InFd = open(InputHeaderFile, "r")
- IncLines = InFd.readlines()
- InFd.close()
-
- Export = False
- for Line in IncLines:
- Match = re.search ("!EXPORT\s+EXTERNAL_BOOTLOADER_STRUCT_(BEGIN|END)\s+", Line)
- if Match:
- if Match.group(1) == "BEGIN":
- Export = True
- continue
- else:
- Export = False
- continue
- if Export:
- HeaderFd.write(Line)
- HeaderFd.write("\n\n")
+ TxtBody = []
+ for Item in self._CfgItemList:
+ if str(Item['cname']) == 'Signature' and Item['length'] == 8:
+ Value = int(Item['value'], 16)
+ Chars = []
+ while Value != 0x0:
+ Chars.append(chr(Value & 0xFF))
+ Value = Value >> 8
+ SignatureStr = ''.join(Chars)
+ if int(Item['offset']) == 0:
+ TxtBody.append("#define FSP_UPD_SIGNATURE %s /* '%s' */\n" % (Item['value'], SignatureStr))
+ elif 'MEM' in SignatureStr:
+ TxtBody.append("#define FSP_MEMORY_INIT_UPD_SIGNATURE %s /* '%s' */\n" % (Item['value'], SignatureStr))
+ else:
+ TxtBody.append("#define FSP_SILICON_INIT_UPD_SIGNATURE %s /* '%s' */\n" % (Item['value'], SignatureStr))
+ TxtBody.append("\n")
for Region in ['UPD', 'VPD']:
@@ -882,14 +953,12 @@ EndList
if Region[0] == 'V':
if 'VPD_TOOL_GUID' not in self._MacroDict:
self.Error = "VPD_TOOL_GUID definition is missing in DSC file"
- Error = 1
- break
+ return 1
BinFile = os.path.join(FvDir, self._MacroDict['VPD_TOOL_GUID'] + ".bin")
if not os.path.exists(BinFile):
self.Error = "VPD binary file '%s' does not exist" % BinFile
- Error = 2
- break
+ return 2
BinFd = open(BinFile, "rb")
IdStr = BinFd.read(0x08)
@@ -897,10 +966,10 @@ EndList
ImageRev = struct.unpack('<I', BinFd.read(0x04))
BinFd.close()
- HeaderFd.write("#define FSP_IMAGE_ID 0x%016X /* '%s' */\n" % (ImageId[0], IdStr))
- HeaderFd.write("#define FSP_IMAGE_REV 0x%08X \n\n" % ImageRev[0])
+ TxtBody.append("#define FSP_IMAGE_ID 0x%016X /* '%s' */\n" % (ImageId[0], IdStr))
+ TxtBody.append("#define FSP_IMAGE_REV 0x%08X \n\n" % ImageRev[0])
- HeaderFd.write("typedef struct _" + Region[0] + "PD_DATA_REGION {\n")
+ TxtBody.append("typedef struct _" + Region[0] + "PD_DATA_REGION {\n")
NextOffset = 0
SpaceIdx = 0
Offset = 0
@@ -922,35 +991,81 @@ EndList
NextVisible = True
Name = "Reserved" + Region[0] + "pdSpace%d" % ResvIdx
ResvIdx = ResvIdx + 1
- HeaderFd.write(self.CreateField (Item, Name, Item["offset"] - ResvOffset, ResvOffset, '', ''))
+ TxtBody.append(self.CreateField (Item, Name, Item["offset"] - ResvOffset, ResvOffset, '', '', ''))
if Offset < Item["offset"]:
if IsInternal or LastVisible:
Name = "Unused" + Region[0] + "pdSpace%d" % SpaceIdx
- LineBuffer.append(self.CreateField (Item, Name, Item["offset"] - Offset, Offset, '',''))
+ LineBuffer.append(self.CreateField (Item, Name, Item["offset"] - Offset, Offset, '', '', ''))
SpaceIdx = SpaceIdx + 1
Offset = Item["offset"]
if Offset != Item["offset"]:
- print "Unsorted offset 0x%04X\n" % Item["offset"]
- error = 2
- break;
+ self.Error = "Unsorted offset 0x%04X\n" % Item["offset"]
+ return 3
LastVisible = NextVisible
Offset = Offset + Item["length"]
if IsInternal or LastVisible:
for Each in LineBuffer:
- HeaderFd.write (Each)
+ TxtBody.append (Each)
LineBuffer = []
- HeaderFd.write(self.CreateField (Item, Item["cname"], Item["length"], Item["offset"], Item['struct'], Item['help']))
+ Embed = Item["embed"].upper()
+ if Embed.endswith(':START') or Embed.endswith(':END'):
+ Marker = '/* EMBED_STRUCT:%s */ ' % Item["embed"]
+ else:
+ if Embed == '':
+ Marker = '';
+ else:
+ self.Error = "Invalid embedded structure format '%s'!\n" % Item["embed"]
+ return 4
+ Line = Marker + self.CreateField (Item, Item["cname"], Item["length"], Item["offset"], Item['struct'], Item['name'], Item['help'])
+ TxtBody.append(Line)
+
+ TxtBody.append("} " + Region[0] + "PD_DATA_REGION;\n\n")
+
+ # Handle the embedded data structure
+ TxtBody = self.PostProcessBody (TxtBody)
+
+ HeaderFd = open(HeaderFile, "w")
+ FileBase = os.path.basename(HeaderFile)
+ FileName = FileBase.replace(".", "_").upper()
+ HeaderFd.write("%s\n" % (__copyright_h__ % date.today().year))
+ HeaderFd.write("#ifndef __%s__\n" % FileName)
+ HeaderFd.write("#define __%s__\n\n" % FileName)
+ HeaderFd.write("#pragma pack(1)\n\n")
+
+ if InputHeaderFile != '':
+ if not os.path.exists(InputHeaderFile):
+ self.Error = "Input header file '%s' does not exist" % InputHeaderFile
+ return 6
+
+ InFd = open(InputHeaderFile, "r")
+ IncLines = InFd.readlines()
+ InFd.close()
- HeaderFd.write("} " + Region[0] + "PD_DATA_REGION;\n\n")
+ Export = False
+ for Line in IncLines:
+ Match = re.search ("!EXPORT\s+EXTERNAL_BOOTLOADER_STRUCT_(BEGIN|END)\s+", Line)
+ if Match:
+ if Match.group(1) == "BEGIN":
+ Export = True
+ continue
+ else:
+ Export = False
+ continue
+ if Export:
+ HeaderFd.write(Line)
+ HeaderFd.write("\n\n")
+
+ for Line in TxtBody:
+ HeaderFd.write (Line)
HeaderFd.write("#pragma pack()\n\n")
HeaderFd.write("#endif\n")
HeaderFd.close()
- return Error
+ return 0
def WriteBsfStruct (self, BsfFd, Item):
if Item['type'] == "None":
@@ -992,7 +1107,22 @@ EndList
elif Item['type'].startswith("EditText"):
BsfFd.write(' %s $%s, "%s",\n' % (Item['type'], PcdName, Item['name']));
WriteHelp = 1
-
+ elif Item['type'] == "Table":
+ Columns = Item['option'].split(',')
+ if len(Columns) != 0:
+ BsfFd.write(' %s $%s "%s",' % (Item['type'], PcdName, Item['name']));
+ for Col in Columns:
+ Fmt = Col.split(':')
+ if len(Fmt) != 3:
+ raise Exception("Column format '%s' is invalid !" % Fmt)
+ try:
+ Dtype = int(Fmt[1].strip())
+ except:
+ raise Exception("Column size '%s' is invalid !" % Fmt[1])
+ BsfFd.write('\n Column "%s", %d bytes, %s' % (Fmt[0].strip(), Dtype, Fmt[2].strip()))
+ BsfFd.write(',\n')
+ WriteHelp = 1
+
if WriteHelp > 0:
HelpLines = Item['help'].split('\\n\\r')
FirstLine = True
@@ -1104,6 +1234,8 @@ def Main():
print "ERROR: Cannot open DSC file '%s' !" % DscFile
return 2
+ UpdateMemSiUpdInitOffsetValue(DscFile)
+
OutFile = ''
if argc > 4:
if sys.argv[4][0] == '-':
@@ -1112,7 +1244,7 @@ def Main():
OutFile = sys.argv[4]
Start = 5
if GenCfgOpt.ParseMacros(sys.argv[Start:]) != 0:
- print "ERROR: %s !" % GenCfgOpt.Error
+ print "ERROR: Macro parsing failed !"
return 3
FvDir = sys.argv[3]
diff --git a/IntelFspPkg/Tools/PatchFv.py b/IntelFspPkg/Tools/PatchFv.py
index 2143161d2c..4421a83bd8 100644
--- a/IntelFspPkg/Tools/PatchFv.py
+++ b/IntelFspPkg/Tools/PatchFv.py
@@ -224,7 +224,7 @@ class Symbols:
modSymbols = {}
fdIn = open(mapFile, "r")
reportLine = fdIn.readline()
- if reportLine.strip().find("Archive member included because of file (symbol)") != -1:
+ if reportLine.strip().find("Archive member included") != -1:
#GCC
# 0x0000000000001d55 IoRead8
patchMapFileMatchString = "\s+(0x[0-9a-fA-F]{16})\s+([^\s][^0x][_a-zA-Z0-9\-]+)\s"
diff --git a/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx b/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx
index e4da8e057b..1cbc459eba 100644
--- a/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx
+++ b/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx
Binary files differ