UefiCpuPkg/PiSmmCpuDxeSmm: Avoid use global variable in InitSmmS3Cr3

This patch is to avoid use global variable in InitSmmS3Cr3. No
function impact.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>

6 files changed, 29 insertions, 20 deletions

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 37d36daf66..caad70ac84 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -243,8 +243,9 @@ InitSmmS3ResumeState (
 

     //

     // Patch SmmS3ResumeState->SmmS3Cr3

+    // The SmmS3Cr3 is only used by S3Resume PEIM to switch CPU from 32bit to 64bit

     //

-    InitSmmS3Cr3 ();

+    InitSmmS3Cr3 ((UINTN *)&SmmS3ResumeState->SmmS3Cr3);

   }

 }

 

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c
index 650090e534..9021f9cf5d 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c
@@ -1,7 +1,7 @@
 /** @file

 IA-32 processor specific functions to enable SMM profile.

 

-Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2012 - 2024, Intel Corporation. All rights reserved.<BR>

 SPDX-License-Identifier: BSD-2-Clause-Patent

 

 **/

@@ -12,13 +12,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 /**

   Create SMM page table for S3 path.

 

+  @param[out] Cr3    The base address of the page tables.

+

 **/

 VOID

 InitSmmS3Cr3 (

-  VOID

+  OUT UINTN  *Cr3

   )

 {

-  mSmmS3ResumeState->SmmS3Cr3 = GenSmmPageTable (PagingPae, mPhysicalAddressBits);

+  ASSERT (Cr3 != NULL);

+

+  *Cr3 = GenSmmPageTable (PagingPae, mPhysicalAddressBits);

 

   return;

 }

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h
index 6c95f2bb19..de4a3a3a25 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h
@@ -1,7 +1,7 @@
 /** @file

 IA-32 processor specific header file to enable SMM profile.

 

-Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2012 - 2024, Intel Corporation. All rights reserved.<BR>

 SPDX-License-Identifier: BSD-2-Clause-Patent

 

 **/

@@ -73,10 +73,12 @@ RestorePageTableAbove4G (
 /**

   Create SMM page table for S3 path.

 

+  @param[out] Cr3    The base address of the page tables.

+

 **/

 VOID

 InitSmmS3Cr3 (

-  VOID

+  OUT UINTN  *Cr3

   );

 

 /**

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
index 760d76a48d..9b00ea41b3 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
@@ -96,12 +96,11 @@ typedef struct {
   UINT64    SmiCmd;

 } SMM_PROFILE_ENTRY;

 

-extern SMM_S3_RESUME_STATE  *mSmmS3ResumeState;

-extern UINTN                gSmiExceptionHandlers[];

-extern BOOLEAN              mXdSupported;

-X86_ASSEMBLY_PATCH_LABEL    gPatchXdSupported;

-X86_ASSEMBLY_PATCH_LABEL    gPatchMsrIa32MiscEnableSupported;

-extern UINTN                *mPFEntryCount;

+extern UINTN              gSmiExceptionHandlers[];

+extern BOOLEAN            mXdSupported;

+X86_ASSEMBLY_PATCH_LABEL  gPatchXdSupported;

+X86_ASSEMBLY_PATCH_LABEL  gPatchMsrIa32MiscEnableSupported;

+extern UINTN              *mPFEntryCount;

 extern UINT64 (*mLastPFEntryValue)[MAX_PF_ENTRY_COUNT];

 extern UINT64                    *(*mLastPFEntryPointer)[MAX_PF_ENTRY_COUNT];

 

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
index 01432d466c..8e15c42d99 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
@@ -1,7 +1,7 @@
 /** @file

 X64 processor specific functions to enable SMM profile.

 

-Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2012 - 2024, Intel Corporation. All rights reserved.<BR>

 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>

 

 SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -29,20 +29,21 @@ UINT64  *mPFPageUplink[MAX_PF_PAGE_COUNT];
 /**

   Create SMM page table for S3 path.

 

+  @param[out] Cr3    The base address of the page tables.

+

 **/

 VOID

 InitSmmS3Cr3 (

-  VOID

+  OUT UINTN  *Cr3

   )

 {

+  ASSERT (Cr3 != NULL);

+

   //

   // Generate level4 page table for the first 4GB memory space

   // Return the address of PML4 (to set CR3)

   //

-  //

-  // The SmmS3Cr3 is only used by S3Resume PEIM to switch CPU from 32bit to 64bit

-  //

-  mSmmS3ResumeState->SmmS3Cr3 = (UINT32)GenSmmPageTable (Paging4Level, 32);

+  *Cr3 = GenSmmPageTable (Paging4Level, 32);

 

   return;

 }

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.h b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.h
index 80205c9b3e..993e1dd63a 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.h
@@ -1,7 +1,7 @@
 /** @file

 X64 processor specific header file to enable SMM profile.

 

-Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>

+Copyright (c) 2012 - 2024, Intel Corporation. All rights reserved.<BR>

 SPDX-License-Identifier: BSD-2-Clause-Patent

 

 **/

@@ -81,10 +81,12 @@ RestorePageTableAbove4G (
 /**

   Create SMM page table for S3 path.

 

+  @param[out] Cr3    The base address of the page tables.

+

 **/

 VOID

 InitSmmS3Cr3 (

-  VOID

+  OUT UINTN  *Cr3

   );

 

 /**