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| author | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-18 23:39:13 +0800 |
|---|---|---|
| committer | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-20 08:54:29 +0800 |
| commit | f8237affd260346043a65669a23f7d5c91af1323 (patch) | |
| tree | 8c057fd847dd67e75a3dbb6ce65c9ec89116c685 | |
| parent | 8cc5e08479349f4ff4f9672696b11ca077a39a5f (diff) | |
| download | edk2-f8237affd260346043a65669a23f7d5c91af1323.tar.gz | |
IntelSiliconPkg/Vtd: Add more debug info.
Add more debug info for reason code.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
| -rw-r--r-- | IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c index bc9f427a36..8dbc83fa2d 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c @@ -481,7 +481,7 @@ DumpVtdRegs ( SourceId.Uint16 = (UINT16)FrcdReg.Bits.SID;
DEBUG((DEBUG_INFO, " Source - B%02x D%02x F%02x\n", SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
DEBUG((DEBUG_INFO, " Type - %x (%a)\n", FrcdReg.Bits.T, FrcdReg.Bits.T ? "read" : "write"));
- DEBUG((DEBUG_INFO, " Reason - %x\n", FrcdReg.Bits.FR));
+ DEBUG((DEBUG_INFO, " Reason - %x (Refer to VTd Spec, Appendix A)\n", FrcdReg.Bits.FR));
}
}
|