diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2020-02-26 14:07:32 +0100 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-03-05 21:08:30 +0000 |
| commit | a2ab46adbc6184248878eba3e3c479a3f253ba27 (patch) | |
| tree | 74f054e6734d6dd66025ddb9adfbe6d166015d48 /ArmPkg | |
| parent | 806d1be6a73acb1567812213500bc9bd01ff4767 (diff) | |
| download | edk2-a2ab46adbc6184248878eba3e3c479a3f253ba27.tar.gz | |
ArmPkg/ArmLib: ASSERT on set/way cache ops being used with MMU on
On ARMv7 and up, doing cache maintenance by set/way is only
permitted in the context of on/offlining a core, and any other
uses should be avoided. Add ASSERT()s in the right place to
ensure that any uses with the MMU enabled are caught in DEBUG
builds.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Diffstat (limited to 'ArmPkg')
| -rw-r--r-- | ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 7 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 7 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/ArmBaseLib.inf | 3 |
3 files changed, 17 insertions, 0 deletions
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index 924bf48020..3fbd591192 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -10,6 +10,7 @@ #include <Base.h>
#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
#include <Chipset/AArch64.h>
@@ -41,6 +42,8 @@ ArmInvalidateDataCache ( VOID
)
{
+ ASSERT (!ArmMmuEnabled ());
+
ArmDataSynchronizationBarrier ();
AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
}
@@ -51,6 +54,8 @@ ArmCleanInvalidateDataCache ( VOID
)
{
+ ASSERT (!ArmMmuEnabled ());
+
ArmDataSynchronizationBarrier ();
AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
}
@@ -61,6 +66,8 @@ ArmCleanDataCache ( VOID
)
{
+ ASSERT (!ArmMmuEnabled ());
+
ArmDataSynchronizationBarrier ();
AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
}
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c index 5d93aa6e0b..2c4a23e1a1 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c @@ -10,6 +10,7 @@ #include <Base.h>
#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
#include <Chipset/ArmV7.h>
@@ -41,6 +42,8 @@ ArmInvalidateDataCache ( VOID
)
{
+ ASSERT (!ArmMmuEnabled ());
+
ArmDataSynchronizationBarrier ();
ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
}
@@ -51,6 +54,8 @@ ArmCleanInvalidateDataCache ( VOID
)
{
+ ASSERT (!ArmMmuEnabled ());
+
ArmDataSynchronizationBarrier ();
ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
}
@@ -61,6 +66,8 @@ ArmCleanDataCache ( VOID
)
{
+ ASSERT (!ArmMmuEnabled ());
+
ArmDataSynchronizationBarrier ();
ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
}
diff --git a/ArmPkg/Library/ArmLib/ArmBaseLib.inf b/ArmPkg/Library/ArmLib/ArmBaseLib.inf index 106a09f821..f61c71b673 100644 --- a/ArmPkg/Library/ArmLib/ArmBaseLib.inf +++ b/ArmPkg/Library/ArmLib/ArmBaseLib.inf @@ -44,6 +44,9 @@ AArch64/AArch64Support.S
AArch64/AArch64ArchTimerSupport.S
+[LibraryClasses]
+ DebugLib
+
[Packages]
ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec
|