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| author | Chasel Chiu <chasel.chiu@intel.com> | 2020-06-04 14:43:40 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-06-23 04:22:49 +0000 |
| commit | 89f569ae8e759dc867009f396a516b7af5a3c0e7 (patch) | |
| tree | d28b5b1587b5c8b4f7a0f2c9c09f545cb3a3c2a6 /IntelFsp2Pkg/Tools | |
| parent | 00b8bf7eda00fb6f0197d3968b6078cfdb4870fa (diff) | |
| download | edk2-89f569ae8e759dc867009f396a516b7af5a3c0e7.tar.gz | |
IntelFsp2Pkg: Add FSP*_ARCH_UPD.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2781
Introduce FSPT_ARCH_UPD and FSPS_ARCH_UPD to support debug events
and multi-phase silicon initialization.
For backward compatibility the original structures are kept and
new ARCH_UPD structures will be included only when UPD header
revision equal or greater than 2.
GenCfgOpt script also updated to prevent from generating duplicate
FSPT_ARCH_UPD and FSPS_ARCH_UPD typedef structures.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/Tools')
| -rw-r--r-- | IntelFsp2Pkg/Tools/GenCfgOpt.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py index d1d6901bc3..e6c15108f5 100644 --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py @@ -1175,7 +1175,7 @@ EndList UpdRegionCheck = ['FSPT', 'FSPM', 'FSPS'] # FSPX_UPD_REGION
UpdConfigCheck = ['FSP_T', 'FSP_M', 'FSP_S'] # FSP_X_CONFIG, FSP_X_TEST_CONFIG, FSP_X_RESTRICTED_CONFIG
UpdSignatureCheck = ['FSPT_UPD_SIGNATURE', 'FSPM_UPD_SIGNATURE', 'FSPS_UPD_SIGNATURE']
- ExcludedSpecificUpd = 'FSPM_ARCH_UPD'
+ ExcludedSpecificUpd = ['FSPT_ARCH_UPD', 'FSPM_ARCH_UPD', 'FSPS_ARCH_UPD']
if InputHeaderFile != '':
if not os.path.exists(InputHeaderFile):
@@ -1229,7 +1229,7 @@ EndList if Match:
StartIndex = Index - 1
Match = re.match("}\s([_A-Z0-9]+);", Line)
- if Match and (UpdRegionCheck[item] in Match.group(1) or UpdConfigCheck[item] in Match.group(1)) and (ExcludedSpecificUpd not in Match.group(1)):
+ if Match and (UpdRegionCheck[item] in Match.group(1) or UpdConfigCheck[item] in Match.group(1)) and (ExcludedSpecificUpd[item] not in Match.group(1)):
EndIndex = Index
StructStart.append(StartIndex)
StructEnd.append(EndIndex)
@@ -1466,7 +1466,7 @@ EndList def Usage():
- print ("GenCfgOpt Version 0.54")
+ print ("GenCfgOpt Version 0.55")
print ("Usage:")
print (" GenCfgOpt UPDTXT PlatformDscFile BuildFvDir [-D Macros]")
print (" GenCfgOpt HEADER PlatformDscFile BuildFvDir InputHFile [-D Macros]")
|