diff options
author | Foster Nong <foster.nong@intel.com> | 2022-07-22 17:10:26 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-08-12 06:50:02 +0000 |
commit | bd06717863ed6cba979fe5300433619aba340403 (patch) | |
tree | 9ca607cec09a509a89c495e442111c0a279c0a60 /MdeModulePkg | |
parent | e76496530c5facf58f57680825adf513265066f0 (diff) | |
download | edk2-bd06717863ed6cba979fe5300433619aba340403.tar.gz |
MdeModulePkg: Enhance bus scan for all root bridge instances
Ref:https://bugzilla.tianocore.org/show_bug.cgi?id=4000
Change flow to bus scan all root bridge instances even when any
one root bridge meet bus resource OUT_OF_RESOURCE case.
thus platform handler of "EfiPciHostBridgeEndBusAllocation" has
an chance to do relative pci bus rebalance to handle this case.
Signed-off-by: Foster Nong <foster.nong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Diffstat (limited to 'MdeModulePkg')
-rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c index 63d149b3b8..d5e3ef4d3f 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c @@ -1,7 +1,7 @@ /** @file
Internal library implementation for PCI Bus module.
-Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -1528,6 +1528,7 @@ PciHostBridgeEnumerator ( UINT8 StartBusNumber;
LIST_ENTRY RootBridgeList;
LIST_ENTRY *Link;
+ EFI_STATUS RootBridgeEnumerationStatus;
if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
InitializeHotPlugSupport ();
@@ -1545,7 +1546,8 @@ PciHostBridgeEnumerator ( }
DEBUG ((DEBUG_INFO, "PCI Bus First Scanning\n"));
- RootBridgeHandle = NULL;
+ RootBridgeHandle = NULL;
+ RootBridgeEnumerationStatus = EFI_SUCCESS;
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
//
// if a root bridge instance is found, create root bridge device for it
@@ -1572,7 +1574,7 @@ PciHostBridgeEnumerator ( }
if (EFI_ERROR (Status)) {
- return Status;
+ RootBridgeEnumerationStatus = Status;
}
}
@@ -1581,6 +1583,10 @@ PciHostBridgeEnumerator ( //
NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
+ if (EFI_ERROR (RootBridgeEnumerationStatus)) {
+ return RootBridgeEnumerationStatus;
+ }
+
if ((gPciHotPlugInit != NULL) && FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
//
// Reset all assigned PCI bus number in all PPB
@@ -1659,7 +1665,7 @@ PciHostBridgeEnumerator ( DestroyRootBridge (RootBridgeDev);
if (EFI_ERROR (Status)) {
- return Status;
+ RootBridgeEnumerationStatus = Status;
}
}
@@ -1667,6 +1673,10 @@ PciHostBridgeEnumerator ( // Notify the bus allocation phase is to end for the 2nd time
//
NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
+
+ if (EFI_ERROR (RootBridgeEnumerationStatus)) {
+ return RootBridgeEnumerationStatus;
+ }
}
//
|