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author | Qiu Shumin <shumin.qiu@intel.com> | 2014-08-07 08:32:54 +0000 |
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committer | shenshushi <shenshushi@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-08-07 08:32:54 +0000 |
commit | e935092fa7e1401201e6faadb04b0ae239dd97a5 (patch) | |
tree | 85848fe871d20ffe69a5da08d32fc3221cc178f3 /MdePkg/Library/BaseCacheMaintenanceLib | |
parent | 0e24145420fc1c4d38ca22437bec44ee32d1465b (diff) | |
download | edk2-e935092fa7e1401201e6faadb04b0ae239dd97a5.tar.gz |
Add type cast for better coding style.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15769 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/BaseCacheMaintenanceLib')
-rw-r--r-- | MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c index 060a146ab0..5246893f94 100644 --- a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c +++ b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c @@ -142,7 +142,7 @@ WriteBackInvalidateDataCacheRange ( // Calculate the cache line alignment
//
End = (Start + Length + (CACHE_LINE_SIZE - 1)) & ~(CACHE_LINE_SIZE - 1);
- Start &= ~(CACHE_LINE_SIZE - 1);
+ Start &= ~((UINTN) CACHE_LINE_SIZE - 1);
do {
Start = (UINTN)AsmFlushCacheLine ((VOID*)Start) + CACHE_LINE_SIZE;
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