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author | Zhang, Chao B <chao.b.zhang@intel.com> | 2018-01-08 10:13:54 +0800 |
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committer | Zhang, Chao B <chao.b.zhang@intel.com> | 2018-03-22 10:43:37 +0800 |
commit | d27e65e3f94df1005ebcfca4e0f426fc605ba4b9 (patch) | |
tree | 40f0924570e2c43d34e3e772f70ba03f72a55be3 /Nt32Pkg/CpuRuntimeDxe | |
parent | 2f8435946aa2c0e35a419808f052a3114b914739 (diff) | |
download | edk2-d27e65e3f94df1005ebcfca4e0f426fc605ba4b9.tar.gz |
SecurityPkg: Tcg2Smm: Enable TPM2.0 interrupt support
1. Expose _CRS, _SRS, _PRS control method to support TPM interrupt
2. Provide 2 PCDs to configure _CRS and _PRS returned data
Cc: Yao Jiewen <jiewen.yao@intel.com>
Cc: Ronald Aigner <Ronald.Aigner@microsoft.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
(cherry picked from commit c4122dcaadb964a3e5d2fe106939bca4f1c261e8)
(cherry picked from commit 1ed328a0d7432f3144a82b3906b62084228577f8)
(cherry picked from commit 4445bb29b3876befaad807c42ed2c3713333fa4d)
Diffstat (limited to 'Nt32Pkg/CpuRuntimeDxe')
0 files changed, 0 insertions, 0 deletions