diff options
| author | Eric Dong <eric.dong@intel.com> | 2018-08-10 10:27:42 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-08-16 08:42:00 +0800 |
| commit | 293f876618c319ca08687e55e126332216185ad6 (patch) | |
| tree | 26be1641ce7a453eb52bfabda58690dde0f4689e /UefiCpuPkg/PiSmmCommunication | |
| parent | 0ca81c0d373ce92a61199faf3d207eefdca1eaa2 (diff) | |
| download | edk2-293f876618c319ca08687e55e126332216185ad6.tar.gz | |
UefiCpuPkg/PiSmmCpuDxeSmm: Use GDT/IDT saved in Smram.
Current implementation will copy GDT/IDT at SmmReadyToLock point
from ACPI NVS memory to Smram. Later at S3 resume phase, it restore
the memory saved in Smram to ACPI NVS. It can directly use GDT/IDT
saved in Smram instead of restore the original ACPI NVS memory.
This patch do this change.
Test Done:
Do the OS boot and S3 resume test.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCommunication')
0 files changed, 0 insertions, 0 deletions