diff options
| author | Tuan Phan <tphan@ventanamicro.com> | 2023-07-14 12:08:24 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-07-15 14:10:18 +0000 |
| commit | f220dcbba86bfc1222180c61bbd31dd6023433db (patch) | |
| tree | 8664b8b0e32903c179710e7f7018bc45722d1d7f /UefiCpuPkg/UefiCpuPkg.dec | |
| parent | cc13dcc57675695d51efe0d61d772155c601a35b (diff) | |
| download | edk2-f220dcbba86bfc1222180c61bbd31dd6023433db.tar.gz | |
UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode
During CpuDxe initialization, MMU will be setup with the highest
mode that HW supports.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Diffstat (limited to 'UefiCpuPkg/UefiCpuPkg.dec')
| -rw-r--r-- | UefiCpuPkg/UefiCpuPkg.dec | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 25126c9136..e7726a605c 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -64,6 +64,11 @@ ## @libraryclass Provides functions for manipulating smram savestate registers.
MmSaveStateLib|Include/Library/MmSaveStateLib.h
+[LibraryClasses.RISCV64]
+ ## @libraryclass Provides functions to manage MMU features on RISCV64 CPUs.
+ ##
+ RiscVMmuLib|Include/Library/BaseRiscVMmuLib.h
+
[Guids]
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
gMsegSmramGuid = { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1, 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
|